[linux-yocto] [PATCH 2/2] valleyisland-io: add baytrail io patch for ata_piix support

[rebecca.swee.fun.chang at intel.com]

From: "Chang, Rebecca Swee Fun" <rebecca.swee.fun.chang at intel.com>

ata_piix: added IDE mode PCI device IDs for Baytrail.

Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
---
 ...4-ata_piix-add-PCI-IDs-for-Intel-Baytrail.patch |   62 ++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 meta/cfg/kernel-cache/features/valleyisland-io/0014-ata_piix-add-PCI-IDs-for-Intel-Baytrail.patch

diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/0014-ata_piix-add-PCI-IDs-for-Intel-Baytrail.patch b/meta/cfg/kernel-cache/features/valleyisland-io/0014-ata_piix-add-PCI-IDs-for-Intel-Baytrail.patch
new file mode 100644
index 0000000..2f824ee
--- /dev/null
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/0014-ata_piix-add-PCI-IDs-for-Intel-Baytrail.patch
@@ -0,0 +1,62 @@
+ata_piix: add PCI IDs for Intel Valley Island platform
+
+Add IDE mode SATA device IDs for the Valley Island platform.
+
+Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
+---
+ drivers/ata/ata_piix.c |   18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
+index 174eca6..e453047 100644
+--- a/drivers/ata/ata_piix.c
++++ b/drivers/ata/ata_piix.c
+@@ -150,6 +150,7 @@ enum piix_controller_ids {
+ 	tolapai_sata,
+ 	piix_pata_vmw,			/* PIIX4 for VMware, spurious DMA_ERR */
+ 	ich8_sata_snb,
++	ich8_2port_sata_byt,
+ };
+
+ struct piix_map_db {
+@@ -317,6 +318,9 @@ static const struct pci_device_id piix_pci_tbl[] = {
+ 	{ 0x8086, 0x9c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+ 	/* SATA Controller IDE (DH89xxCC) */
+ 	{ 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
++	/* SATA Controller IDE (BYT) */
++	{ 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
++	{ 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+ 	{ }	/* terminate list */
+ };
+
+@@ -422,6 +426,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
+ 	[ich8m_apple_sata]	= &ich8m_apple_map_db,
+ 	[tolapai_sata]		= &tolapai_map_db,
+ 	[ich8_sata_snb]		= &ich8_map_db,
++	[ich8_2port_sata_byt]	= &ich8_2port_map_db,
+ };
+
+ static struct pci_bits piix_enable_bits[] = {
+@@ -1225,6 +1230,19 @@ static struct ata_port_info piix_port_info[] = {
+ 		.udma_mask	= ATA_UDMA6,
+ 		.port_ops	= &piix_sata_ops,
+ 	},
++
++	/*
++	 * from Sandybridge onward no longer support PIO 32 mode
++	 */
++	[ich8_2port_sata_byt] =
++	{
++		.flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
++		.pio_mask       = ATA_PIO4,
++		.mwdma_mask     = ATA_MWDMA2,
++		.udma_mask      = ATA_UDMA6,
++		.port_ops       = &piix_sata_ops,
++	},
++
+ };
+
+ #define AHCI_PCI_BAR 5
+--
+1.7.10.4
+
-- 
1.7.10.4