[linux-yocto] [PATCH 15/28] mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller

[rebecca.swee.fun.chang at intel.com]

From: Maurice Petallo <mauricex.r.petallo at intel.com>

This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.

Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
Acked-by: Adrian Hunter <adrian.hunter at intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
(cherry picked from commit f25c33724d1512a72554c0ad4cb70b43ba15374e)
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
---
 drivers/mmc/host/sdhci-acpi.c | 3 ++-
 drivers/mmc/host/sdhci-pci.c  | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
index 1bf275e..b1dd2c4 100644
--- a/drivers/mmc/host/sdhci-acpi.c
+++ b/drivers/mmc/host/sdhci-acpi.c
@@ -116,7 +116,8 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
 
 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
 	.chip    = &sdhci_acpi_chip_int,
-	.caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | MMC_CAP_HW_RESET,
+	.caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
+		   MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR,
 	.caps2   = MMC_CAP2_HC_ERASE_SZ,
 	.flags   = SDHCI_ACPI_RUNTIME_PM,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index ae403e7..e9ac1c4 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -330,7 +330,7 @@ static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
 {
 	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
-				 MMC_CAP_HW_RESET;
+				 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR;
 	slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
 	slot->hw_reset = sdhci_pci_int_hw_reset;
 	return 0;
-- 
1.9.1