[linux-yocto] [PATCH 11/13] MIPS: OCTEON: Add module to inject hardware error conditions.

[Chandrakala Chavva]

From: Abhishek Paliwal <abhishek.paliwal at aricent.com>

From: David Daney <david.daney at cavium.com>
From: Leonid Rosenboim <lrosenboim at caviumnetworks.com>
From: Chandrakala Chavva <cchavva at caviumnetworks.com>

MIPS: OCTEON: Force L1 Dcache and TLB parity errors for testing.

MIPS: OCTEON: Keep reset value for COP0_ERRCTL

The COP0_ERRCTL used for checking dcache, TLB, write_buffer parity errors.
Their are other bits with some reset value.

Signed-off-by: David Daney <david.daney at cavium.com>
Signed-off-by: Leonid Rosenboim <lrosenboim at caviumnetworks.com>
Signed-off-by: Chandrakala Chavva <cchavva at caviumnetworks.com>
Signed-off-by: Abhishek Paliwal <abhishek.paliwal at aricent.com>
---
 arch/mips/cavium-octeon/Makefile | 1 +
 arch/mips/cavium-octeon/setup.c  | 8 +++++---
 arch/mips/mm/c-octeon.c          | 4 ++--
 arch/mips/mm/cex-oct.S           | 3 ++-
 drivers/edac/octeon_edac-pc.c    | 4 +++-
 5 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 4e95204..e16fd26 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -20,6 +20,7 @@ obj-y += executive/
 obj-$(CONFIG_MTD)		      += flash_setup.o
 obj-$(CONFIG_SMP)		      += smp.o
 obj-$(CONFIG_OCTEON_ILM)	      += oct_ilm.o
+obj-$(CONFIG_OCTEON_ERROR_INJECTOR)    += octeon-error-injector.o
 
 DTS_FILES = octeon_3xxx.dts octeon_68xx.dts
 DTB_FILES = $(patsubst %.dts, %.dtb, $(DTS_FILES))
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 7027044..83355fb 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -395,9 +395,11 @@ void octeon_check_cpu_bist(void)
 	if (bist_val & mask)
 		pr_err("Core%d BIST Failure: COP0_CVM_MEM_CTL = 0x%llx\n",
 		       coreid, bist_val);
-	if (current_cpu_type() == CPU_CAVIUM_OCTEON3)
-		write_octeon_c0_errctl(1);
-	else
+	if (current_cpu_type() == CPU_CAVIUM_OCTEON3) {
+		bist_val = read_octeon_c0_errctl();
+		bist_val |= 1;
+		write_octeon_c0_errctl(bist_val);
+	} else
 		write_octeon_c0_dcacheerr(0);
 }
 
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 14d91ee..c0a0fb4 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -271,7 +271,7 @@ static int octeon3_be_handler(struct pt_regs *regs, int is_fixup)
 			pr_err("CacheErr (Dcache) == %llx\n", dcache_err);
 		}
 
-		write_octeon_c0_errctl(wbfperr_mask);
+		write_octeon_c0_errctl(dcache_err | wbfperr_mask);
 		return MIPS_BE_FATAL;
 	}
 	if (is_fixup)
@@ -294,7 +294,7 @@ static int octeon3_mcheck_handler(struct pt_regs *regs)
 		union octeon_cvmemctl cvmmemctl;
 
 		/* Clear the indicator */
-		write_octeon_c0_errctl(tlbperr_mask);
+		write_octeon_c0_errctl(dcache_err | tlbperr_mask);
 		/*
 		 * Blow everything away to (hopefully) write good
 		 * parity to all TLB entries
diff --git a/arch/mips/mm/cex-oct.S b/arch/mips/mm/cex-oct.S
index e73fec3..225b163 100644
--- a/arch/mips/mm/cex-oct.S
+++ b/arch/mips/mm/cex-oct.S
@@ -70,7 +70,8 @@
 
 	dmfc0   k0, CP0_ERRCTL
 	sd      k0, (k1)
-	andi    k0, 1           /* Write 1 to clear Dcache parity error */
+	ori     k0, k0, 1
+	xori    k0, k0, 1               /* clear Dcache parity error */
 	dmtc0   k0, CP0_ERRCTL
 
 	/* check whether this is a nested exception */
diff --git a/drivers/edac/octeon_edac-pc.c b/drivers/edac/octeon_edac-pc.c
index 5e88867..1d5c99d 100644
--- a/drivers/edac/octeon_edac-pc.c
+++ b/drivers/edac/octeon_edac-pc.c
@@ -91,7 +91,9 @@ static int  co_cache_error_event(struct notifier_block *this,
 
 		/* Clear the error indication */
 		if (current_cpu_type() == CPU_CAVIUM_OCTEON3)
-			write_octeon_c0_errctl(1);
+			u64 errctl = read_octeon_c0_errctl();
+			errctl |= 1;
+			write_octeon_c0_errctl(errctl);
 		else if (current_cpu_type() == CPU_CAVIUM_OCTEON2)
 			write_octeon_c0_dcacheerr(1);
 		else
-- 
1.8.1.4