[linux-yocto] [PATCH 1/1] drm: fix up post-merge commit
Bruce Ashfield
bruce.ashfield at windriver.com
Mon Jul 11 21:17:44 PDT 2016
On 2016-07-11 5:07 PM, Eric Ernst wrote:
> It appears that the merge of drm-forklift-v4.4.14 into
> standard/intel/base was completed without issue, but there
> were errors with the merge conflict resolution when merging base
> into bxt-rebase. This patch applies the diff between standard/intel/bxt-rebase
> and standard/intel/base for drivers/gpu/drm and include/drm.
>
> After this, compilation of bxt-rebase is successful, and the drm driver
> matches what is expected in drm-forklift-v4.4.14 exactly.
Merged.
Thanks for the quick fix, I would have tried to fix it on Tuesday .. but
it would have taken me a lot longer!
Bruce
>
> Signed-off-by: Eric Ernst <eric.ernst at linux.intel.com>
> ---
> drivers/gpu/drm/drm_atomic.c | 12 +++---
> drivers/gpu/drm/drm_atomic_helper.c | 4 +-
> drivers/gpu/drm/drm_crtc.c | 30 --------------
> drivers/gpu/drm/i915/i915_debugfs.c | 3 --
> drivers/gpu/drm/i915/i915_dma.c | 4 --
> drivers/gpu/drm/i915/i915_drv.c | 21 ----------
> drivers/gpu/drm/i915/i915_gem_gtt.c | 3 --
> drivers/gpu/drm/i915/i915_irq.c | 2 -
> drivers/gpu/drm/i915/intel_csr.c | 3 --
> drivers/gpu/drm/i915/intel_ddi.c | 6 +--
> drivers/gpu/drm/i915/intel_display.c | 26 +-----------
> drivers/gpu/drm/i915/intel_dp.c | 42 -------------------
> drivers/gpu/drm/i915/intel_drv.h | 16 --------
> drivers/gpu/drm/i915/intel_dsi.c | 4 --
> drivers/gpu/drm/i915/intel_fbdev.c | 2 +-
> drivers/gpu/drm/i915/intel_guc_fwif.h | 72 ---------------------------------
> drivers/gpu/drm/i915/intel_guc_loader.c | 3 --
> drivers/gpu/drm/i915/intel_opregion.c | 19 ---------
> drivers/gpu/drm/i915/intel_pm.c | 8 ++--
> drivers/gpu/drm/i915/intel_ringbuffer.c | 21 ----------
> drivers/gpu/drm/i915/intel_runtime_pm.c | 28 -------------
> include/drm/drm_crtc.h | 2 -
> 22 files changed, 14 insertions(+), 317 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 2545fc9b584e..b6a0fcb194f5 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -623,8 +623,8 @@ drm_atomic_get_plane_state(struct drm_atomic_state *state,
> state->planes[index] = plane;
> plane_state->state = state;
>
> - DRM_DEBUG_ATOMIC("Added [PLANE:%d:%s] %p state to %p\n",
> - plane->base.id, plane->name, plane_state, state);
> + DRM_DEBUG_ATOMIC("Added [PLANE:%d] %p state to %p\n",
> + plane->base.id, plane_state, state);
>
> if (plane_state->crtc) {
> struct drm_crtc_state *crtc_state;
> @@ -835,8 +835,8 @@ static int drm_atomic_plane_check(struct drm_plane *plane,
> }
>
> if (plane_switching_crtc(state->state, plane, state)) {
> - DRM_DEBUG_ATOMIC("[PLANE:%d:%s] switching CRTC directly\n",
> - plane->base.id, plane->name);
> + DRM_DEBUG_ATOMIC("[PLANE:%d] switching CRTC directly\n",
> + plane->base.id);
> return -EINVAL;
> }
>
> @@ -1315,8 +1315,8 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
> for_each_plane_in_state(state, plane, plane_state, i) {
> ret = drm_atomic_plane_check(plane, plane_state);
> if (ret) {
> - DRM_DEBUG_ATOMIC("[PLANE:%d:%s] atomic core check failed\n",
> - plane->base.id, plane->name);
> + DRM_DEBUG_ATOMIC("[PLANE:%d] atomic core check failed\n",
> + plane->base.id);
> return ret;
> }
> }
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
> index f3059951e0c5..dd8d72fe25cd 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -554,8 +554,8 @@ drm_atomic_helper_check_planes(struct drm_device *dev,
>
> ret = funcs->atomic_check(plane, plane_state);
> if (ret) {
> - DRM_DEBUG_ATOMIC("[PLANE:%d:%s] atomic driver check failed\n",
> - plane->base.id, plane->name);
> + DRM_DEBUG_ATOMIC("[PLANE:%d] atomic driver check failed\n",
> + plane->base.id);
> return ret;
> }
> }
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index c2aafb64d384..807f349b9fdb 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1196,18 +1196,6 @@ void drm_encoder_cleanup(struct drm_encoder *encoder)
> }
> EXPORT_SYMBOL(drm_encoder_cleanup);
>
> -static unsigned int drm_num_planes(struct drm_device *dev)
> -{
> - unsigned int num = 0;
> - struct drm_plane *tmp;
> -
> - drm_for_each_plane(tmp, dev) {
> - num++;
> - }
> -
> - return num;
> -}
> -
> /**
> * drm_universal_plane_init - Initialize a new universal plane object
> * @dev: DRM device
> @@ -1251,22 +1239,6 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
> return -ENOMEM;
> }
>
> - if (name) {
> - va_list ap;
> -
> - va_start(ap, name);
> - plane->name = kvasprintf(GFP_KERNEL, name, ap);
> - va_end(ap);
> - } else {
> - plane->name = kasprintf(GFP_KERNEL, "plane-%d",
> - drm_num_planes(dev));
> - }
> - if (!plane->name) {
> - kfree(plane->format_types);
> - drm_mode_object_put(dev, &plane->base);
> - return -ENOMEM;
> - }
> -
> memcpy(plane->format_types, formats, format_count * sizeof(uint32_t));
> plane->format_count = format_count;
> plane->possible_crtcs = possible_crtcs;
> @@ -1357,8 +1329,6 @@ void drm_plane_cleanup(struct drm_plane *plane)
> if (plane->state && plane->funcs->atomic_destroy_state)
> plane->funcs->atomic_destroy_state(plane, plane->state);
>
> - kfree(plane->name);
> -
> memset(plane, 0, sizeof(*plane));
> }
> EXPORT_SYMBOL(drm_plane_cleanup);
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index e33e91c78fc3..58e2f48b4fd7 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2530,9 +2530,6 @@ static int i915_guc_info(struct seq_file *m, void *data)
> if (mutex_lock_interruptible(&dev->struct_mutex))
> return 0;
>
> - if (mutex_lock_interruptible(&dev->struct_mutex))
> - return 0;
> -
> /* Take a local copy of the GuC data, so we can dump it at leisure */
> guc = dev_priv->guc;
> if (guc.execbuf_client)
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index d938f24ca9e8..5c7615041b31 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1051,8 +1051,6 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
> intel_init_audio_hooks(dev_priv);
> i915_gem_load_init(dev);
>
> - intel_runtime_pm_get(dev_priv);
> -
> intel_display_crc_init(dev);
>
> i915_dump_device_info(dev_priv);
> @@ -1391,8 +1389,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>
> intel_runtime_pm_put(dev_priv);
>
> - intel_runtime_pm_put(dev_priv);
> -
> return 0;
>
> out_cleanup_vblank:
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 8f74c7ad85e9..55f58a60f85c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -368,21 +368,6 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> };
>
> -static const struct intel_device_info intel_kabylake_info = {
> - HSW_FEATURES,
> - .is_preliminary = 1,
> - .is_kabylake = 1,
> - .gen = 9,
> -};
> -
> -static const struct intel_device_info intel_kabylake_gt3_info = {
> - HSW_FEATURES,
> - .is_preliminary = 1,
> - .is_kabylake = 1,
> - .gen = 9,
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> -};
> -
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
> @@ -529,12 +514,6 @@ void intel_detect_pch(struct drm_device *dev)
> ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
> pch->subsystem_vendor == 0x1af4 &&
> pch->subsystem_device == 0x1100)) {
> - WARN_ON(!IS_SKYLAKE(dev) &&
> - !IS_KABYLAKE(dev));
> - } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
> - ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
> - pch->subsystem_vendor == 0x1af4 &&
> - pch->subsystem_device == 0x1100)) {
> dev_priv->pch_type = intel_virt_detect_pch(dev);
> } else
> continue;
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5fe9309dd042..0d666b3f7e9b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3077,9 +3077,6 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
> ggtt->base.bind_vma = ggtt_bind_vma;
> ggtt->base.unbind_vma = ggtt_unbind_vma;
>
> - if (IS_CHERRYVIEW(dev_priv))
> - dev_priv->gtt.base.insert_entries = gen8_ggtt_insert_entries__BKL;
> -
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index e95925129701..2f6fd33c07ba 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1934,8 +1934,6 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
>
> enable_rpm_wakeref_asserts(dev_priv);
>
> - enable_rpm_wakeref_asserts(dev_priv);
> -
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 25d24d14b480..a34c23eceba0 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -287,9 +287,6 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
> if (!fw)
> return NULL;
>
> - stepping = stepping_info->stepping;
> - substepping = stepping_info->substepping;
> -
> /* Extract CSS Header information*/
> css_header = (struct intel_css_header *)fw->data;
> if (sizeof(struct intel_css_header) !=
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 7543fe522801..a887b31cb684 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1757,12 +1757,8 @@ static bool broxton_phy_is_enabled(struct drm_i915_private *dev_priv,
>
> return false;
> }
> - ret = true;
>
> -out:
> - intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
> -
> - return ret;
> + return true;
> }
>
> static u32 broxton_get_grc(struct drm_i915_private *dev_priv, enum dpio_phy phy)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b2f9f5f81390..ff60241b1f76 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4103,12 +4103,6 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
> I915_WRITE(FDI_RX_TUSIZE1(pipe),
> I915_READ(PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
>
> - /*
> - * Sometimes spurious CPU pipe underruns happen during FDI
> - * training, at least with VGA+HDMI cloning. Suppress them.
> - */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> -
> /* For PCH output, training FDI link */
> dev_priv->display.fdi_link_train(crtc);
>
> @@ -4143,8 +4137,6 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
>
> intel_fdi_normal_train(crtc);
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> -
> /* For PCH DP, enable TRANS_DP_CTL */
> if (HAS_PCH_CPT(dev) && intel_crtc->config->has_dp_encoder) {
> const struct drm_display_mode *adjusted_mode =
> @@ -4763,9 +4755,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>
> if (intel_crtc->config->has_pch_encoder)
> - intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
> -
> - if (intel_crtc->config->has_pch_encoder)
> intel_prepare_shared_dpll(intel_crtc);
>
> if (intel_crtc->config->has_dp_encoder)
> @@ -4952,8 +4941,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
> intel_wait_for_vblank(dev, hsw_workaround_pipe);
> intel_wait_for_vblank(dev, hsw_workaround_pipe);
> }
> -
> - intel_fbc_enable(intel_crtc);
> }
>
> static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force)
> @@ -4999,10 +4986,8 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
>
> ironlake_pfit_disable(intel_crtc, false);
>
> - if (intel_crtc->config->has_pch_encoder) {
> + if (intel_crtc->config->has_pch_encoder)
> ironlake_fdi_disable(crtc);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - }
>
> for_each_encoder_on_crtc(dev, crtc, encoder)
> if (encoder->post_disable)
> @@ -6192,8 +6177,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
>
> for_each_encoder_on_crtc(dev, crtc, encoder)
> encoder->enable(encoder);
> -
> - intel_fbc_enable(intel_crtc);
> }
>
> static void i9xx_pfit_disable(struct intel_crtc *crtc)
> @@ -6255,8 +6238,6 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
>
> if (!IS_GEN2(dev))
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> -
> - intel_fbc_disable_crtc(intel_crtc);
> }
>
> static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
> @@ -8198,8 +8179,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
>
> ret = false;
>
> - ret = false;
> -
> tmp = I915_READ(PIPECONF(crtc->pipe));
> if (!(tmp & PIPECONF_ENABLE))
> goto out;
> @@ -13681,9 +13660,6 @@ static int intel_atomic_commit(struct drm_device *dev,
> to_intel_crtc_state(crtc->state);
> bool update_pipe = !modeset && pipe_config->update_pipe;
>
> - if (modeset)
> - intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
> -
> if (modeset && crtc->state->active) {
> update_scanline_offset(to_intel_crtc(crtc));
> dev_priv->display.crtc_enable(crtc);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 463fb1316bdb..a3fc49430c26 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1143,8 +1143,6 @@ static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
> MISSING_CASE(port);
> return DP_AUX_CH_DATA(PORT_A, index);
> }
> -
> - return 0;
> }
>
> static i915_reg_t intel_aux_ctl_reg(struct drm_i915_private *dev_priv,
> @@ -2651,35 +2649,12 @@ static void intel_enable_dp(struct intel_encoder *encoder)
> if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> vlv_init_panel_power_sequencer(intel_dp);
>
> - /*
> - * We get an occasional spurious underrun between the port
> - * enable and vdd enable, when enabling port A eDP.
> - *
> - * FIXME: Not sure if this applies to (PCH) port D eDP as well
> - */
> - if (port == PORT_A)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> -
> intel_dp_enable_port(intel_dp);
>
> - if (port == PORT_A && IS_GEN5(dev_priv)) {
> - /*
> - * Underrun reporting for the other pipe was disabled in
> - * g4x_pre_enable_dp(). The eDP PLL and port have now been
> - * enabled, so it's now safe to re-enable underrun reporting.
> - */
> - intel_wait_for_vblank_if_active(dev_priv->dev, !pipe);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, !pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, !pipe, true);
> - }
> -
> edp_panel_vdd_on(intel_dp);
> edp_panel_on(intel_dp);
> edp_panel_vdd_off(intel_dp, true);
>
> - if (port == PORT_A)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> -
> pps_unlock(intel_dp);
>
> if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
> @@ -2721,25 +2696,11 @@ static void vlv_enable_dp(struct intel_encoder *encoder)
>
> static void g4x_pre_enable_dp(struct intel_encoder *encoder)
> {
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> enum port port = dp_to_dig_port(intel_dp)->port;
>
> intel_dp_prepare(encoder);
>
> - if (port == PORT_A && IS_GEN5(dev_priv)) {
> - /*
> - * We get FIFO underruns on the other pipe when
> - * enabling the CPU eDP PLL, and when enabling CPU
> - * eDP port. We could potentially avoid the PLL
> - * underrun with a vblank wait just prior to enabling
> - * the PLL, but that doesn't appear to help the port
> - * enable case. Just sweep it all under the rug.
> - */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, !pipe, false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, !pipe, false);
> - }
> -
> /* Only ilk+ has port A */
> if (port == PORT_A)
> ironlake_edp_pll_on(intel_dp);
> @@ -5872,9 +5833,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> if (HAS_DDI(dev))
> intel_dp->prepare_link_retrain = intel_ddi_prepare_link_retrain;
>
> - if (HAS_DDI(dev))
> - intel_dp->prepare_link_retrain = intel_ddi_prepare_link_retrain;
> -
> /* Preserve the current hw state. */
> intel_dp->DP = I915_READ(intel_dp->output_reg);
> intel_dp->attached_connector = intel_connector;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index cb844a83381b..b9f1304439e2 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1336,22 +1336,6 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
> bool
> intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
>
> -void
> -intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> - uint8_t dp_train_pat);
> -void
> -intel_dp_set_signal_levels(struct intel_dp *intel_dp);
> -void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
> -uint8_t
> -intel_dp_voltage_max(struct intel_dp *intel_dp);
> -uint8_t
> -intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing);
> -void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> - uint8_t *link_bw, uint8_t *rate_select);
> -bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
> -bool
> -intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
> -
> /* intel_dp_mst.c */
> int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
> void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 6a64542abcc6..2b22bb9bb86f 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -766,8 +766,6 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
> active = true;
> break;
> }
> -out:
> - intel_display_power_put(dev_priv, power_domain);
>
> out_put_power:
> intel_display_power_put(dev_priv, power_domain);
> @@ -787,8 +785,6 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,
> enum port port;
> u16 vfp, vsync, vbp;
>
> - pipe_config->has_dsi_encoder = true;
> -
> /*
> * Atleast one port is active as encoder->get_config called only if
> * encoder->get_hw_state() returns true.
> diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
> index 92db80da1452..ab8d09a81f14 100644
> --- a/drivers/gpu/drm/i915/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/intel_fbdev.c
> @@ -119,7 +119,7 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
> {
> struct intel_fbdev *ifbdev =
> container_of(helper, struct intel_fbdev, helper);
> - struct drm_framebuffer *fb = NULL;
> + struct drm_framebuffer *fb;
> struct drm_device *dev = helper->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 106f163c86be..2de57ffe5e18 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -219,78 +219,6 @@ struct guc_css_header {
> uint32_t header_info;
> } __packed;
>
> -/**
> - * DOC: GuC Firmware Layout
> - *
> - * The GuC firmware layout looks like this:
> - *
> - * +-------------------------------+
> - * | guc_css_header |
> - * | contains major/minor version |
> - * +-------------------------------+
> - * | uCode |
> - * +-------------------------------+
> - * | RSA signature |
> - * +-------------------------------+
> - * | modulus key |
> - * +-------------------------------+
> - * | exponent val |
> - * +-------------------------------+
> - *
> - * The firmware may or may not have modulus key and exponent data. The header,
> - * uCode and RSA signature are must-have components that will be used by driver.
> - * Length of each components, which is all in dwords, can be found in header.
> - * In the case that modulus and exponent are not present in fw, a.k.a truncated
> - * image, the length value still appears in header.
> - *
> - * Driver will do some basic fw size validation based on the following rules:
> - *
> - * 1. Header, uCode and RSA are must-have components.
> - * 2. All firmware components, if they present, are in the sequence illustrated
> - * in the layout table above.
> - * 3. Length info of each component can be found in header, in dwords.
> - * 4. Modulus and exponent key are not required by driver. They may not appear
> - * in fw. So driver will load a truncated firmware in this case.
> - */
> -
> -struct guc_css_header {
> - uint32_t module_type;
> - /* header_size includes all non-uCode bits, including css_header, rsa
> - * key, modulus key and exponent data. */
> - uint32_t header_size_dw;
> - uint32_t header_version;
> - uint32_t module_id;
> - uint32_t module_vendor;
> - union {
> - struct {
> - uint8_t day;
> - uint8_t month;
> - uint16_t year;
> - };
> - uint32_t date;
> - };
> - uint32_t size_dw; /* uCode plus header_size_dw */
> - uint32_t key_size_dw;
> - uint32_t modulus_size_dw;
> - uint32_t exponent_size_dw;
> - union {
> - struct {
> - uint8_t hour;
> - uint8_t min;
> - uint16_t sec;
> - };
> - uint32_t time;
> - };
> -
> - char username[8];
> - char buildnumber[12];
> - uint32_t device_id;
> - uint32_t guc_sw_version;
> - uint32_t prod_preprod_fw;
> - uint32_t reserved[12];
> - uint32_t header_info;
> -} __packed;
> -
> struct guc_doorbell_info {
> u32 db_status;
> u32 cookie;
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 53328344dabb..876e5da44c4e 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -392,9 +392,6 @@ int intel_guc_ucode_load(struct drm_device *dev)
> if (!i915.enable_guc_submission)
> return 0;
>
> - if (!i915.enable_guc_submission)
> - return 0;
> -
> DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
> intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
> intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index b1f58167d044..99e26034ae8d 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -918,25 +918,6 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = {
> { }
> };
>
> -static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
> -{
> - DRM_DEBUG_KMS("Falling back to manually reading VBT from "
> - "VBIOS ROM for %s\n", id->ident);
> - return 1;
> -}
> -
> -static const struct dmi_system_id intel_no_opregion_vbt[] = {
> - {
> - .callback = intel_no_opregion_vbt_callback,
> - .ident = "ThinkCentre A57",
> - .matches = {
> - DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
> - DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
> - },
> - },
> - { }
> -};
> -
> int intel_opregion_setup(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9d5e5dc782f7..867a73099fcc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2595,8 +2595,6 @@ static void ilk_compute_wm_results(struct drm_device *dev,
>
> /* LP0 register values */
> for_each_intel_crtc(dev, intel_crtc) {
> - const struct intel_crtc_state *cstate =
> - to_intel_crtc_state(intel_crtc->base.state);
> enum pipe pipe = intel_crtc->pipe;
> const struct intel_wm_level *r =
> &intel_crtc->wm.active.ilk.wm[0];
> @@ -3736,9 +3734,9 @@ static void ilk_program_watermarks(struct drm_i915_private *dev_priv)
>
> /* 5/6 split only in single pipe config on IVB+ */
> if (INTEL_INFO(dev)->gen >= 7 &&
> - config->num_pipes_active == 1 && config->sprites_enabled) {
> - ilk_compute_wm_maximums(dev, 1, config, INTEL_DDB_PART_5_6, &max);
> - ilk_wm_merge(dev, config, &max, &lp_wm_5_6);
> + config.num_pipes_active == 1 && config.sprites_enabled) {
> + ilk_compute_wm_maximums(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
> + ilk_wm_merge(dev, &config, &max, &lp_wm_5_6);
>
> best_lp_wm = ilk_find_best_result(dev, &lp_wm_1_2, &lp_wm_5_6);
> } else {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 7a55b2b5abc9..245386e20c52 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2093,27 +2093,6 @@ void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
> i915_gem_object_ggtt_unpin(ringbuf->obj);
> }
>
> -static u32 *vmap_obj(struct drm_i915_gem_object *obj)
> -{
> - struct sg_page_iter sg_iter;
> - struct page **pages;
> - void *addr;
> - int i;
> -
> - pages = drm_malloc_ab(obj->base.size >> PAGE_SHIFT, sizeof(*pages));
> - if (pages == NULL)
> - return NULL;
> -
> - i = 0;
> - for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, 0)
> - pages[i++] = sg_page_iter_page(&sg_iter);
> -
> - addr = vmap(pages, i, 0, PAGE_KERNEL);
> - drm_free_large(pages);
> -
> - return addr;
> -}
> -
> int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev,
> struct intel_ringbuffer *ringbuf)
> {
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 7a2a4ffd0e10..7fb1da4e7fc3 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1987,34 +1987,6 @@ static struct i915_power_well skl_power_wells[] = {
> },
> };
>
> -void skl_pw1_misc_io_init(struct drm_i915_private *dev_priv)
> -{
> - struct i915_power_well *well;
> -
> - if (!IS_SKYLAKE(dev_priv))
> - return;
> -
> - well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
> - intel_power_well_enable(dev_priv, well);
> -
> - well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
> - intel_power_well_enable(dev_priv, well);
> -}
> -
> -void skl_pw1_misc_io_fini(struct drm_i915_private *dev_priv)
> -{
> - struct i915_power_well *well;
> -
> - if (!IS_SKYLAKE(dev_priv))
> - return;
> -
> - well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
> - intel_power_well_disable(dev_priv, well);
> -
> - well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
> - intel_power_well_disable(dev_priv, well);
> -}
> -
> static struct i915_power_well bxt_power_wells[] = {
> {
> .name = "always-on",
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 9154fabd2698..477be8b0a9a0 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -866,8 +866,6 @@ struct drm_plane {
> struct drm_device *dev;
> struct list_head head;
>
> - char *name;
> -
> struct drm_modeset_lock mutex;
>
> struct drm_mode_object base;
>
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