[linux-yocto] [PATCH 0/1] eMMC patches for Baytrail in Yocto-kernel-cache
chong.yi.chai at intel.com
chong.yi.chai at intel.com
Wed Mar 30 20:15:48 PDT 2016
From: "Chai, Chong Yi" <chong.yi.chai at intel.com>
These patches are to enable eMMC features in Baytrail.
The patches are targeted to merge into Yocto-kernel-cache on branch yocto-3.14.
Patch mmc: sdhci: Preset value not supported in Baytrail eMMC and
mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller are in mainline
and the rest of patches is for enabling Baytrail eMMC features.
1/7 [
Author: Maurice Petallo
Email: mauricex.r.petallo at intel.com
Date: Tue, 8 Jul 2014 19:11:00 +0800
Subject: [PATCH 025/164] mmc: sdhci: Preset value not supported in Baytrail
eMMC
"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit
preset value enabling for Baytrail eMMC controller.
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
Acked-by: Adrian Hunter <adrian.hunter at intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
(cherry picked from commit d61b59461b0cd0106f03e566d537b9072029e059)
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
]
2/7 [
Author: Maurice Petallo
Email: mauricex.r.petallo at intel.com
Date: Tue, 8 Jul 2014 19:11:01 +0800
Subject: [PATCH 026/164] mmc: sdhci: add DDR50 1.8V mode support for BayTrail
eMMC Controller
This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
Acked-by: Adrian Hunter <adrian.hunter at intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
(cherry picked from commit f25c33724d1512a72554c0ad4cb70b43ba15374e)
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
]
3/7 [
Author: "Chew, Kean Ho"
Email: kean.ho.chew at intel.com
Date: Mon, 23 Dec 2013 16:14:27 +0800
Subject: [PATCH 031/164] mmc: sdhci: Force BYT SDCARD host to run with SDR25
mode
The clock appears to be unstable when SDCARD host running with
DDR50 mode, thus causing CRC issue. This is to introduce a new
quirk to force host with broken DDR50 mode to run with SDR25
mode.
Signed-off-by: Chew, Kean Ho <kean.ho.chew at intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew at intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
]
4/7 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.mohamad at intel.com
Date: Sun, 26 Jul 2015 12:35:21 +0800
Subject: [PATCH 137/164] mmc: block: refactor read-only handling
There are several reasons why gendisk corresponding to SD/eMMC card or
hardware partition is read-only for the system:
- underlying device is readonly (due to write protect GPIO, or due to
card lacks support for write commands),
- due to card-level write protection (currently supported only for eMMC
boot partitions),
- due to software 'force_ro' attribute (currently enabled by default for
eMMC boot partitions).
This is managed indirectly, via gendisk's read-only flag.
Since more possible read-only reasons are about to be added, need to
replace that with explicit handling.
This patch turns 'read_only' field of struct mmc_blk_data into a bitmask,
with individual bits representing possible read-only reasons. Gendisk
is marked read-only when at least one bit is set in the mask, and
is marked read-write when last bit is cleared.
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad at intel.com>
]
5/7 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.mohamad at intel.com
Date: Sun, 26 Jul 2015 13:09:23 +0800
Subject: [PATCH 138/164] mmc: block: implement write request blocking
This commit will enable write request blocking via
/sys/block/mmcblkN/block_writes.
When non-zero is written there, devices is synced, and then all write
requests to device are errored out.
This is unsafe. Use at own risk.
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad at intel.com>
]
6/7 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.mohamad at intel.com
Date: Sun, 26 Jul 2015 14:40:37 +0800
Subject: [PATCH 140/164] mmc: support whole-device temporary write protection
over CSD bits 13:12
This commit add support for eMMC whole-device temporary write protection
feature. mmcblk device get new "card_wp" attribute, that can be used to read
and change device-side write protection.
For safety reasons, setting permanent write protection is not supported.
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad at intel.com>
]
7/7 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.mohamad at intel.com
Date: Fri, 21 Aug 2015 12:34:31 +0800
Subject: [PATCH 157/164] mmc: block: Fix checkpatch.pl warning
This commit is to fix the result of running scripts/checkpatch.pl against
0137-mmc-block-refactor-read-only-handling.patch
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad at intel.com>
]
Chai, Chong Yi (1):
mmc: sdhci: Preset value not supported in Baytrail eMMC
features/soc/baytrail/baytrail.scc | 7 +
.../mmc-block-Fix-checkpatch.pl-warning.patch | 31 ++
...mc-block-implement-write-request-blocking.patch | 180 ++++++++++
.../mmc-block-refactor-read-only-handling.patch | 214 ++++++++++++
...orce-BYT-SDCARD-host-to-run-with-SDR25-mo.patch | 80 +++++
...reset-value-not-supported-in-Baytrail-eMM.patch | 47 +++
...dd-DDR50-1.8V-mode-support-for-BayTrail-e.patch | 50 +++
...-whole-device-temporary-write-protection-.patch | 367 +++++++++++++++++++++
8 files changed, 976 insertions(+)
create mode 100644 features/soc/baytrail/mmc-block-Fix-checkpatch.pl-warning.patch
create mode 100644 features/soc/baytrail/mmc-block-implement-write-request-blocking.patch
create mode 100644 features/soc/baytrail/mmc-block-refactor-read-only-handling.patch
create mode 100644 features/soc/baytrail/mmc-sdhci-Force-BYT-SDCARD-host-to-run-with-SDR25-mo.patch
create mode 100644 features/soc/baytrail/mmc-sdhci-Preset-value-not-supported-in-Baytrail-eMM.patch
create mode 100644 features/soc/baytrail/mmc-sdhci-add-DDR50-1.8V-mode-support-for-BayTrail-e.patch
create mode 100644 features/soc/baytrail/mmc-support-whole-device-temporary-write-protection-.patch
--
1.9.1
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