[linux-yocto] [[PATCH 0/1] x86 patches for Baytrail in Yocto-kernel-cache

[chong.yi.chai at intel.com]

From: "Chai, Chong Yi" <chong.yi.chai at intel.com>

These patches are to enable x86 features in Baytrail. 
The patches are targeted to merge into Yocto-kernel-cache on branch yocto-3.14.

1/2 [
Author: "Chew, Chiau Ee"
From: chiau.ee.chew at intel.com
Date: Fri, 27 Dec 2013 23:22:20 +0800
Subject: [PATCH 001/164] x86/Kconfig: add PCI dependency for
 CONFIG_X86_INTEL_LPSS

Allow CONFIG_X86_INTEL_LPSS to be set when ACPI
or PCI is set.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew at intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
]

2/2 [
Author: "Chew, Chiau Ee"
From: chiau.ee.chew at intel.com
Date: Mon, 13 Jan 2014 00:43:59 +0800
Subject: [PATCH 002/164] x86/byt: enable board file for BYT LPSS PCI mode

This commit enables the following:
- setup clock tree for PCI mode SPI, DMA and PWM host
  as the controller drivers require clock information during
  device/driver probe
- register SPI slave

Conflicts:
	arch/x86/Kconfig
Modified from byt_3.10.31_dev_ltsi to remove unnecessary change.
Merge patch: Fix device name string for clkdev registration

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew at intel.com>
Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.petallo at intel.com>
]

Chai, Chong Yi (1):
  x86: Kconfig: add PCI dependency for CONFIG_X86_INTEL_LPSS

 features/soc/baytrail/baytrail.scc                 |   2 +
 ...-add-PCI-dependency-for-CONFIG_X86_INTEL_.patch |  31 ++++
 ...t-enable-board-file-for-BYT-LPSS-PCI-mode.patch | 157 +++++++++++++++++++++
 3 files changed, 190 insertions(+)
 create mode 100644 features/soc/baytrail/x86-Kconfig-add-PCI-dependency-for-CONFIG_X86_INTEL_.patch
 create mode 100644 features/soc/baytrail/x86-byt-enable-board-file-for-BYT-LPSS-PCI-mode.patch

-- 
1.9.1