[meta-ti] [PATCH] u-boot 2011.12: fix beagleboard C4 memory detection

Tom Rini tom.rini at gmail.com
Mon Jan 30 07:20:16 PST 2012


On Mon, Jan 30, 2012 at 12:54 AM, Koen Kooi <koen at dominion.thruhere.net> wrote:
>
> Op 29 jan. 2012, om 14:51 heeft Koen Kooi het volgende geschreven:
>
>> Test results (which emberassingly enough lack an actual C4):
>>
>> BeagleBoard B6:
>>
>>       OMAP3530-GP ES2.1, CPU-OPP2, L3-165MHz, Max CPU Clock 600 mHz
>>       OMAP3 Beagle board + LPDDR/NAND
>>       I2C:   ready
>>       DRAM:  128 MiB
>>       NAND:  256 MiB
>>       [..]
>>       Beagle Rev Ax/Bx
>>
>> BeagleBoard C3:
>>
>>       OMAP3530-GP ES3.0, CPU-OPP2, L3-165MHz, Max CPU Clock 600 mHz
>>       OMAP3 Beagle board + LPDDR/NAND
>>       I2C:   ready
>>       DRAM:  256 MiB
>>       NAND:  256 MiB
>>       [..]
>>       Beagle Rev C1/C2/C3
>>
>> BeagleBoard C5:
>>
>>       OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz
>>       OMAP3 Beagle board + LPDDR/NAND
>>       I2C:   ready
>>       DRAM:  256 MiB
>>       NAND:  512 MiB
>>       [..]
>>       Beagle Rev C4
>>
>
> And now the big question: how should these be flashed to NAND?

My sequence is:
mmc rescan 0;fatload mmc 0 82000000 MLO;nandecc hw;nand erase 0
80000;nand write 82000000 0 20000;nand write 82000000 20000 20000;nand
write 82000000 40000 20000;nand write 82000000 60000 20000;fatload mmc
0 0x80200000 u-boot.img;nand erase 80000 170000;nand write 0x80200000
80000 170000

IOW, u-boot.img now goes in with HW, not SW EC

-- 
Tom



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