[meta-xilinx] Options for automatically generating BOOT.BIN file for ZC702 using Yocto

[Elvis Dowson]

Hi Mike,

On Apr 6, 2014, at 11:07, Mike Looijmans <mike.looijmans at topic.nl> wrote:

>> Suppose I want to use the traditional method (for the moment), and want to get at the u-boot.elf file using Yocto, how would I got about exporting it to the deploy/images folder (e.g. command/script fragment) ?
>> 
>> Is there any examples of any layers using a pre-built zynq_fsbl.elf, u-boot.elf and system_top.bit files to create a BOOT.BIN file using Yocto?
> 
> The other u-boot script in the same layer has been doing that:
> 
> https://github.com/topic-embedded-products/meta-topic/blob/master/recipes-bsp/u-boot/u-boot-zynq_git.bb
> 
> It picks a prebuilt fsbl and combines it with u-boot.bin for deployment.

What are the environment variables that I have to set for Vivado-2013.4?

Scanning through the meta-topic layer, I find the following, do let me know if I’ve listed all the variables:

XILINX_TOOL_PATH
XILINX_VIVADO_PATH
ZYNQ_BOOTGEN

Should I additionally set the following?

PATH_TO_BITSTREAMS
PATH_TO_HW_EXPORT

What about the path to the zynq_fsbl.elf file?

I notice from looking at the fpga-image-adi.bb file that you’re using the ADI fpgahdl_xilinx.git repositories to pull in all the designs.

ADI have recently released Vivado compatible versions of their reference designs here:

https://github.com/analogdevicesinc/hdl

I suppose the fpga-image.inc file won’t be able to handle the HDL designs from this repo at the moment, and needs to be modified accordingly?


Regards,

Elvis Dowson
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