[meta-xilinx] Significant improvements of Cadence SPI interface.

[Anders Berndtsson]

Dear All Xilinx Yocto user,

Had problem to get  the Cadence SPI interface to work.

I found when the transfer_one function was interrupted it caused a time out
in the spi.c > transfer_one function.

By changing from writel_relaxed to writel and readl_relaxed to readl, the
SPI interface is now running stable.

Perhaps can someone explain the exact difference between the two function
types and if it will give other unexpected surprises? 

 

spi-cadence.c 

 

/* Macros for the SPI controller read/write */

static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset)

{

//            return readl_relaxed(xspi->regs + offset);

                return readl(xspi->regs + offset);

}

 

static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32
val)

{

//            writel_relaxed(val, xspi->regs + offset);

                writel(val, xspi->regs + offset);

}

 

Also added cpol and cpha flags to default CR register settings.

This to set the clock line high already at hardware initialization.

It seems that spi-cpol and spi-cpha flags in the device tree has no
influence on the Cadence device, and they are always active as default.

The reason to do this is that many cpi chips (like my RTC ds3234) detects
the level of the clock line when CS goes active and use this to set the
clock phase.

Before I made this change the first message had wrong clock phase. The spi
device sets the cpol and cpha flags in CR register after CS is asserted the
first time which is too late. 

To be correct the "cdns_spi_init_hw(struct cdns_spi *xspi)"  function should
know the spi-cpha and spi-cpol flags already at hardware init but there is
no access to the spi_device structure which stores the information.

Perhaps can someone find a solution?

 

Spi-cadence.c 

 

#define CDNS_SPI_CR_DEFAULT_MASK               (CDNS_SPI_CR_MSTREN_MASK | \

 
CDNS_SPI_CR_SSCTRL_MASK | \

 
CDNS_SPI_CR_SSFORCE_MASK | \

 
CDNS_SPI_CR_BAUD_DIV_4_MASK | \

+
CDNS_SPI_CR_CPOL_MASK | \

+
CDNS_SPI_CR_CPHA_MASK)

 

It would be appreciated if someone can verify this changes and create a
patch.

 

Merry Christmas to you all.

Anders Berndtsson

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