[meta-xilinx] Bitstream/Boot.bin/etc - Providers/Virtual targets

[Cjw X]

So, there already exists an ezynq based spl build. I made it, and it is
posted public on gitbub.
https://github.com/vxmdesign/u-boot-xlnx

I also (sort of) fixed it so that it isn't based on a specific version of
u-boot. Granted, it is now under my fork, so it currently depends on me to
keep it up. However, the modifications to the base stock u-boot from Xilinx
is pretty minimal. It is basically just adding files. (Though I also
haven't added qspi support yet)

So, it seems like your concerns about the main drawbacks of ezynq have been
addressed. It uses SPL, and it isn't really dependent on a version anymore.
If people are interested, I can write up the few changes required.

The problem with the ps_init setup, is that it requires Xilinx tools and an
fpga project just to make the system boot. It also configures things that
should not be configured by the bootloader. I know at *least* the fpga
clocks are configured this way, and I expect there are more.

For example, if I have two bitstreams that have two different fpga clocks,
not only do I not have the ability to change between them on the fly, I
can't even just change the bitstream, it requires a different bootloader.
Right now it doesn't seem like there is any plan to really address this.

-Chris




On Fri, Feb 14, 2014 at 2:37 AM, Michal Simek <monstr at monstr.eu> wrote:

> Hi,
>
> On 02/14/2014 12:11 AM, Cjw X wrote:
> > I totally agree with Andrey. The fact is, if you have the resources to
> > actually put a Zynq board down on a pcb and have in manufactured, you can
> > take the few hours it takes to configure Ezynq platform. (Ezynq is pretty
> > cool BTW. Can I mail you a beer or something???)
> >
> > There should not be any dependencies in the software system on the fpga
> > design. I should not have to change my software system based on changes
> to
> > HDL. This is why I find the ps_init mechanism less appealling than the
> > ezynq system.
>
> I hope that we haven't start to mix 2 things together - low level
> configuration
> generation and u-boot itself.
>
> Vivado or EDK are able to generate ps7_init.c/h files from design tool
> and you can use if for board configuration. (FSBL uses them too).
> If you like it then just use tool for generation.
>
> If you don't like it like Andrey then feel free to create any software
> for better ps7_init generation.
> Andrey has done that and it is really nice to see it working
> and I really appreciate all his work.
>
>
> For u-boot itself is shouldn't matter if you take this file from
> xilinx tools or from your tools but u-boot source code
> should just work with both. It means top level configuration function
> should be the same. I have chosen ps7_init() because I am not
> able to change tools behaviour.
>
> Currently low level configuration is run in u-boot SPL
> where ps7_init() is called. If you want to run just full u-boot
> from OCM we can look at it.
>
> Thanks,
> Michal
>
> --
> Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
> w: www.monstr.eu p: +42-0-721842854
> Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
> Maintainer of Linux kernel - Xilinx Zynq ARM architecture
> Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
>
>
>
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