[meta-xilinx] meta-zynq

[Edward Vidal]

Hello All
I have been debugging the receipe meta-zynq/recipes-bsp/fpga/fpga-image.bb.
This appears to be dependend on serveral items.  My local Xilinx work okay
on a precise1-Ubuntu SMP Wed Aug 14 16:19:23 UTC 2013 x86_64 x86_64 x86_64
GNU/Linux that I recently just converted to.
I have not used Vivado only XPS until now.
In my local.conf I have BOARD_DESIGN_URI = "git://
github.com/analogdevicesinc/fpgahdl_xilinx.git".  I am thinking this is
what provides the files below.
build/tmp-eglibc/work/zedboard-oe-linux-gnueabi/fpga-image/5.AUTOINC-0a90b0d42e-r0$
ls git
cf_ad5541a_kc705  cf_adv7511_zed  cf_xcomm_kc705  cf_xcomm_zed
cf_ad9361_zc706   cf_imageon_zed  cf_xcomm_vc707  README.md
cf_adv7511_zc702  cf_lib          cf_xcomm_zc702
cf_adv7511_zc706  cf_xcomm        cf_xcomm_zc706
I am thinking that I am interested in cf_adv7511_zed for the zedboard
which has the following data folder and files license.txt  system.mhs
system.xmp.  In do_compile the else "source
${XILINX_TOOL_PATH}/ISE_DS/settings${XILINX_TOOL_ARCH}.sh" appears to be
the problem.

My local.conf has XILINX_TOOL_PATH = "/opt/Xilinx/14.4" & XILINX_TOOL_ARCH
= "64".  In addition I have XILINX_LM_LICENSE_FILE =
"/home/vidal/.Xilinx/Xilinx.lic" in my local.conf.

Manually I can execute the following:
cd
~/POKY/zynq_oe/build/tmp-eglibc/work/zedboard-oe-linux-gnueabi/fpga-image/5.AUTOINC-0a90b0d42e-r0/git/cf_adv7511_zed

source /opt/Xilinx/14.4/ISE_DS/settings64.sh
This is what I get

. /opt/Xilinx/14.4/ISE_DS/common/.settings64.sh
/opt/Xilinx/14.4/ISE_DS/common
. /opt/Xilinx/14.4/ISE_DS/EDK/.settings64.sh /opt/Xilinx/14.4/ISE_DS/EDK
. /opt/Xilinx/14.4/ISE_DS/common/CodeSourcery/.settings64.sh
/opt/Xilinx/14.4/ISE_DS/common/CodeSourcery
. /opt/Xilinx/14.4/ISE_DS/PlanAhead/.settings64.sh
/opt/Xilinx/14.4/ISE_DS/PlanAhead
. /opt/Xilinx/14.4/ISE_DS/../../Vivado/2012.4/.settings64.sh
/opt/Xilinx/14.4/ISE_DS/../../Vivado/2012.4
. /opt/Xilinx/14.4/ISE_DS/ISE/.settings64.sh /opt/Xilinx/14.4/ISE_DS/ISE
. /opt/Xilinx/14.4/ISE_DS/../../Vivado_HLS/2012.4/.settings64.sh
/opt/Xilinx/14.4/ISE_DS/../../Vivado_HLS/2012.4
I can then execute "xps system.xmp" and the gui appears.  Now I can execute
"Export Design" and I get no errors and 264 warnings.
   sourcing the settings64.sh
|
/home/vidal/POKY/zynq_oe/build/tmp-eglibc/work/zedboard-oe-linux-gnueabi/fpga-image/5.AUTOINC-0a90b0d42e-r0/temp/run.do_compile.2999:
141:
/home/vidal/POKY/zynq_oe/build/tmp-eglibc/work/zedboard-oe-linux-gnueabi/fpga-image/5.AUTOINC-0a90b0d42e-r0/temp/run.do_compile.2999:
source: not found
| WARNING: exit code 127 from a shell command.
| ERROR: Function failed: do_compile (log file is located at
/home/vidal/POKY/zynq_oe/build/tmp-eglibc/work/zedboard-oe-linux-gnueabi/fpga-image/5.AUTOINC-0a90b0d42e-r0/temp/log.do_compile.2999)
ERROR: Task 6 (/home/vidal/POKY/zynq_oe/meta-zynq/recipes-bsp/fpga/
fpga-image.bb, do_compile) failed with exit code '1'

Any and all help is appreciated.
Thanks
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