[meta-xilinx] Recipes for MicroZed

[Anders Berndtsson]

Thanks Nathan,

Hard to be a hardware developer this days!
Now I'm near most ready to start working, after weeks learning Linux and
Yocto.
 
I think I managed to figure out most of the important things.
But I'm missing instructions how to use the device drivers for data transfer
between PS and PL.
Need help how to understand and use 
1.	dma0chan0-7
2.	f800800. ps7-afi 
3.	ram0 to ram15 

Difficult to find any actual datasheets and code examples on internet, or
perhaps I'm searching on the wrong places.

Actually I need a block device which can be open for writing, where I can
write data from PS to PL, and a matching IP core in the PL which receives
the data.
I can then open a socket in a thread to receive data from Ethernet filling
memory and a second tread reading data from the memory and move it into the
PL. Any suggestions how to do, perhaps some c-code example.

One more question.
Why can't I set the fclk0-3 in the ZYNQ7 processing core? It seems that it
only works from the PS side using device fclk->set_rate.
Is there any way so set the initial clock value direct when the core is
booting up? Or do I need to use a link the /etc/rc0.d to a script in init.d?
When is it best to load the bit file? From u-boot or after the linux is
running using /dev/xdevcfg?
Should I first set my needed clocks and then load the PL?
Some startup instructions step by step would be nice. 

Regards

Anders


 



-----Original Message-----
From: Nathan Rossi [mailto:nathan.rossi at xilinx.com] 
Sent: den 17 januari 2014 03:44
To: Anders Berndtsson
Cc: meta-xilinx at yoctoproject.org
Subject: RE: [meta-xilinx] Recipes for MicroZed

> -----Original Message-----
> From: meta-xilinx-bounces at yoctoproject.org [mailto:meta-xilinx- 
> bounces at yoctoproject.org] On Behalf Of Anders Berndtsson
> Sent: Monday, January 13, 2014 10:11 PM
> To: meta-xilinx at yoctoproject.org
> Subject: [meta-xilinx] Recipes for MicroZed
> 
> Hallo all,
> 
> I have made recipes for the MiroZed board, based on the current Master 
> branch.
> 
> During the development I had problem to access the SD cards.
> 
> Finally I found a solution at the Elphel project where the clocks 
> frequency are changed in the device tree generator for the ps7_sd_0 as 
> follows.
> 
> 
> 
>                                 ps7_sd_0: ps7-sdio at e0100000 {
> 
>                                                 clock-frequency = 
> <0x7735940>;
> 
>                                                 clock-names = 
> "ref_clk", "aper_clk";
> 
>                                                 clocks = <&clkc 21>, 
> <&clkc 32>;
> 
>                                                 compatible = 
> "xlnx,ps7- sdio-1.00.a", "generic-sdhci"  , "arasan,sdhci-8.9a";
> 
>                                                 interrupt-parent = 
> <&ps7_scugic_0>;
> 
>                                                 interrupts = <0 24 4>;
> 
>                                                 reg = <0xe0100000 
> 0x1000>;
> 
>                                                 xlnx,has-cd = <0x0>;
> 
>                                                 xlnx,has-power = 
> <0x0>;
> 
>                                                 xlnx,has-wp = <0x0>;
> 
>                                                 xlnx,sdio-clk-freq-hz 
> = <0x3f93e10>;
> 
>                                 } ;
> 
> 
> 
> I have now following questions.
> 
> 1.       Why is it working with this frequencies? In Xilinx-Zynq manual
> max frequency for the SD core is 50Mhz and also the zedboard is using 
> 50 MHz.

For all Zynq boards in meta-xilinx we stick with 50 MHz and we do not have
any issues. It is indeed interesting that you are having issues, but I
suspect it may be board or card specific? Try a different brand/type of card
and see if you get different results.

Unfortunately I don't know much about the MicroZed, does it have any
external board or MIO changes such that it is forced to operate at a
different clock?

> 
> 2.       On the zed board the WP and CD are connected to MDIO 46 and 47,
> on microzed there is no WP and CD is connected to MDIO 46. In the 
> device tree generator I disabled all signals but it seems that the CD 
> works anyway, how come?

The "xlnx,has-cd" and "xlnx,has-wp" properties are not actually used by the
Linux kernel, they are merely generated from the device tree generator as
the information is available.

Check the drivers there may be a different property you can use to disable
WP. Although I imagine just disabling it via the MIO is enough?

> 
> 3.       Where can I find the source code for the ps7_sd_0 driver?

Depends on which kernel you are using, the newer kernels use the arasan
driver, older kernels use the xilinxps driver.

https://github.com/Xilinx/linux-xlnx/blob/xlnx_3.8/drivers/mmc/host/sdhci-of
-xilinxps.c
https://github.com/Xilinx/linux-xlnx/blob/master/drivers/mmc/host/sdhci-of-a
rasan.c


Regards,
Nathan

> 
> 
> 
> My images seems to work well and stable, but I'm a newbie for both 
> linux and Yocto so I will not publish anything official.
> 
> If someone is interested to test out this recipes and do the work I'm 
> glad to chair my code. Just send a mail.
> 
> 
> 
> Regards
> 
> Anders

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