[meta-xilinx] SPI spidev hanging in write and ioctl
Anders Berndtsson
anders.berndtsson at idptech.se
Wed Mar 19 04:10:08 PDT 2014
Dear All
Userspace spidev is hanging in write() and ioctl().
Kernel : XLNX 3.8 and 3.10 (same behavior ).
ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits); works OK
ioctl(fd, SPI_IOC_MESSAGE(2), mesg); hangs
write(fd, : hangs
Same code on yocto>raspberry-pi works and also the SPI interface!!
Device tree settings:
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_1;
spi0 = &ps7_qspi_0;
spi1 = &ps7_spi_1;
} ;
chosen {
:::
.
.
.
:::
ps7_spi_1: ps7-spi at e0007000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 26>, <&clkc 35>;
compatible = "xlnx,ps7-spi-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 49 4>;
num-chip-select = <3>;
reg = <0xe0007000 0x1000>;
bus-num = <1>;
speed-hz = <1000000>; // 1MHz
xlnx,has-ss0=<0x0>; // off
xlnx,has-ss1=<0x1>; // on
xlnx,has-ss2=<0x0>; // on
xlnx,spi-clk-freq-hz=<1000000>;
#address-cells = <1>;
#size-cells = <0>;
spidev at 1{
compatible="spidev";
reg =<1>; // chipselect 1
spi-max-frequency= <1000000>;
} ;
spidev at 2{
compatible="spidev";
reg =<2>; // chipselect 2
spi-max-frequency= <1000000>;
} ;
Kernel configuration (both for XLNX 3.8 and 3.10)
----------------------------------------------------------------------------
--------------------------┐ │
│ │ --- SPI support
│ │
│ │ [ ] Debug support for SPI drivers
│ │
│ │ *** SPI Master Controller Drivers ***
│ │
│ │ < > Altera SPI Controller
│ │
│ │ -*- Utilities for Bitbanging SPI masters
│ │
│ │ < > GPIO-based bitbanging SPI Master
│ │
│ │ [ ] Freescale SPI controller and Aeroflex Gaisler
GRLIB SPI controller │ │
│ │ < > OpenCores tiny SPI
│ │
│ │ < > ARM AMBA PL022 SSP controller
│ │
│ │ < > PXA2xx SSP SPI master
│ │
│ │ < > NXP SC18IS602/602B/603 I2C to SPI bridge
│ │
│ │ < > Intel EG20T PCH/LAPIS Semicon
IOH(ML7213/ML7223/ML7831) SPI │ │
│ │ < > Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge
driver │ │
│ │ <*> Xilinx SPI controller common module
│ │
│ │ <*> Xilinx PS QSPI controller
│ │
│ │ [ ] Xilinx PS QSPI Dual stacked configuration
│ │
│ │ <*> Xilinx PS SPI controller
│ │
│ │ < > DesignWare SPI controller core support
│ │
│ │ *** SPI Protocol Masters ***
│ │
│ │ <*> User mode SPI device driver support
│ │
│ │ < > Infineon TLE62X0 (for power switching)
│ │
│ │
│ │
Both /dev/spidev1.1 and /dev/spidev1.2 appears
Under cat /proc/devices I get > 153 spi
All MIO configured to
MIO 10 > SPI1,MOSI
MIO 11 > SPI1,MISO
MIO 12 > SPI1,CLK
MIO 13 > SPI1,SS0
MOI 14 > SPI1,SS1
MIO 15 > SPI1,SS2
Do I miss something?
Do I configure the SPI controller separately?
Can someone advise how to make the correct settings / how to debug.
Best Regards
Anders Berndtsson
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