[meta-xilinx] hardware/software handoff workflow zedboard

[Shaun Purvis]

Hi Robert,

Hardware/Software hand-off is accomplished with an HDF file exported by the
Xilinx tools.  This stands for Hardware Definition File, but the file
format is actually just a packaged archive of various files that describe
the hardware system.

The PetaLinux flow would 'automatically' update software projects to sync
to this file.  In a non-PetaLinux flow, you must do this manually.  For
example, Xilinx provides command-line utilities that you can use to create
a DTS from the HDF.

Regards,
Shaun.

*Shaun Purvis*
*Embedded Systems*
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On Thu, Dec 17, 2015 at 7:38 AM, <gmane at reliableembeddedsystems.com> wrote:

> Hi,
>
> Assuming you have a hardware and a software team/person.
> How is your workflow?
> I mean what files do hardware people need to handoff to software people in
> order to incorporate IP blocks in software?
>
> It looks like hardware people generate with Vivado a .bin file, which can
> be converted[1] into something u-boot can load and program.
>
> So far so good, but we'll also need some driver and a fdt.
>
> I would like to use meta-xilinx or something like that and no magic
> PetaLinux tools!
>
> So I guess we'll need to distinguish between
> 1) IP blocks Vivado knows about (and possibly has drivers and some kind of
> fdt templates) and
> 2) custom IP blocks, where I'll need to write my own driver (maybe Vivado
> can help a bit with the fdt).
>
> As you can see I'm a software person and would like to see if/how Vivado
> can help, what kind of files it can provide and how it integrates with
> fdt/device drivers for out of the box IP blocks as well as custom stuff.
>
> I would assume a gpio or LED driver would be the first thing I wanted to
> play with.
>
> Regards,
>
> Robert
>
>
> [1]
> https://github.com/topic-embedded-products/meta-topic/blob/master/recipes-bsp/fpga/fpga-bit-to-bin/fpga-bit-to-bin.py
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