[meta-xilinx] [PATCH 12/12] qemuzynq: Update clock work around for QEMU 2.5+
Nathan Rossi
nathan at nathanrossi.com
Mon Dec 28 04:46:12 PST 2015
The GEM phy in QEMU 2.5+ reports a link speed of 100Mbps, which requires
a slower clock. Change the fixed clock to provide a 25MHz reference.
Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
---
conf/machine/boards/qemu/qemuzynq-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/conf/machine/boards/qemu/qemuzynq-base.dtsi b/conf/machine/boards/qemu/qemuzynq-base.dtsi
index 9d6b8c7..abb8bf5 100644
--- a/conf/machine/boards/qemu/qemuzynq-base.dtsi
+++ b/conf/machine/boards/qemu/qemuzynq-base.dtsi
@@ -9,14 +9,14 @@
reg = <0x0 0x40000000>;
} ;
ps7_axi_interconnect_0: amba at 0 {
- /* Setup a fixed 125 MHz clock to trick the ethernet driver */
- clk125mhz: clock {
+ /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */
+ fixednetclk: clock {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <125000000>;
+ clock-frequency = <25000000>;
} ;
ps7_ethernet_0: ps7-ethernet at e000b000 {
- clocks = <&clkc 30>, <&clkc 30>, <&clk125mhz>, <&clk125mhz>, <&clkc 30>;
+ clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>;
phy-handle = <&phy0>;
phy-mode = "gmii";
phy0: phy at 23 {
--
2.6.4
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