[meta-xilinx] Xylon DRM support in 3.19 xilinx kernel
Ahsan, Noor
Noor_Ahsan at mentor.com
Wed Oct 14 03:28:33 PDT 2015
Guys,
Any help will be appreciated.
Noor
From: Khan, Yasir
Sent: Tuesday, October 13, 2015 9:21 PM
To: meta-xilinx at lists.yoctoproject.org
Cc: Ahsan, Noor
Subject: Xylon DRM support in 3.19 xilinx kernel
Hello all,
Has anyone been successful in getting the HDMI display to work on zc702 evaluation kit board using the logicBricks HDMI controller IP and latest 3.19 xilinx kernel? I get the below kernel log on boot showing the xylon drm driver unable to load.
[ 1.080584] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to f006c000
[ 1.088988] [drm] Initialized drm 1.1.0 20060810
[ 1.099887] [drm] logiCVC IP core 4.00.a
[ 1.103774] [drm] logicvc registers not readable
[ 1.108357] [drm] logicvc size-position disabled
[ 1.113059] [drm] no private-plane property
[ 1.117455] [drm:xylon_drm_crtc_create] *ERROR* failed get pixel clock
[ 1.123967] [drm:xylon_drm_load] *ERROR* failed create xylon crtc
[ 1.130186] [drm] driver load deferred, will be called again
[ 1.140422] platform amba at 0:xylon_drm: Driver xylon-drm requests probe deferral
FYI, I've below device nodes in dts
logicvc_1: logicvc at 40030000 {
compatible = "xylon,logicvc-4.00.a";
reg = <0x40030000 0x10000>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 58 4>;
background-layer-bits-per-pixel = <32>;
background-layer-type = "rgb";
color-space = <1>;
interface = <0>;
is-readable-regs;
is-size-position;
pixel-stride = <2048>;
pixel-clock-active-high =<1>;
pixel-data-invert = <0>;
layer_0 {
bits-per-pixel = <32>;
type = "rgb";
transparency = "layer";
} ;
layer_1 {
bits-per-pixel = <16>;
type = "yuv";
transparency = "layer";
} ;
} ;
xylon_drm {
compatible = "xylon,drm-1.00.a";
clocks = <&si570>;
device = <&logicvc_1>;
encoder = <&adv7511>;
private-plane = <0>;
} ;
Any help would be highly appreciated.
Thanks,
Yasir
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