[meta-xilinx] FSBL.elf and BOOT.BIN using bitbake and SDCard booting

Nathan Rossi nathan at nathanrossi.com
Tue Oct 11 21:14:51 PDT 2016 

On Wed, Oct 12, 2016 at 2:00 PM, Giordon Stark <kratsg at gmail.com> wrote:
> Hi,
>
> Still unable to find it:
>
> kratsg at dc:~/d4/poky/build/tmp/work/gfex_prototype2-poky-linux-gnueabi/u-boot-spl-xlnx/v2015.04-xilinx+gitAUTOINC+1160fbcc61-r0$
> ls
> 0001-microblaze-Fix-style-issues-in-header-files.patch
> deploy-u-boot-spl-xlnx  microblaze-Fix-EMAC-Lite-initialization.patch
> pkgdata      u-boot-spl-xlnx.spec
> 0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch  git
> microblaze-generic_defconfig-Disable-configs.patch  pseudo
> zynq-Add-Zynq-PicoZed-board-support.patch
> configure.sstate image package     sysroot-destdir
> deploy-rpms license-destdir packages-split     temp
>
>
> For the headers, I don't know what you mean by
> "include/configs/zynq_zc70x.h" beacuse I have no idea what path you're
> referring to...

Oleg is referring relative to the root of the u-boot source directory.
(aka in the git/ directory from your listing above).

However just looking at the source of u-boot-xlnx at the jethro
version (xilinx-v2015.2) the configs should be set fine:

https://github.com/Xilinx/u-boot-xlnx/blob/xilinx-v2015.2/include/configs/zynq_zc70x.h#L21
#define CONFIG_ZYNQ_SDHCI0

Which enables the SPL_MMC and SPL_FAT configs.
https://github.com/Xilinx/u-boot-xlnx/blob/xilinx-v2015.2/include/configs/zynq-common.h#L497


Without more information on your setup I can only speculate on what is
actually the issue. Maybe the files have been copied to the SD card
incorrectly? or that the SD card you are using is missing a partition
table? or maybe the FAT partition is corrupt and SPL is having trouble
reading it?

Regards,
Nathan

>
> On Tue, Oct 11, 2016 at 12:59 PM Oleg K Dzhimiev <oleg at elphel.com> wrote:
>>
>> u-boot-xlnx/spl/ or u-boot-spl-xlnx/spl/
>>
>>> kratsg at dc:~/d4/poky/build/tmp/work/gfex_prototype2-poky-linux-gnueabi$
>>> find -name u-boot-spl.cfg
>>
>>
>> Define it in include/configs/zynq_zc70x.h before zynq-common.h gets
>> included:
>>>
>>> #define CONFIG_ZYNQ_SDHCI
>>> #include <configs/zynq-common.h>
>>
>>
>>
>> On 11 October 2016 at 11:41, Giordon Stark <kratsg at gmail.com> wrote:
>>>
>>> Hi Oleg,
>>>
>>> still looking for it?
>>>
>>> kratsg at dc:~/d4/poky/build/tmp/work/gfex_prototype2-poky-linux-gnueabi$ ls
>>> base-files     device-tree linux-xlnx    packagegroup-core-boot
>>> sysvinit-inittab  u-boot-xlnx
>>> depmodwrapper-cross  fsbl-platform-init  packagegroup-base
>>> shadow-securetty    u-boot-spl-xlnx   zynq-base
>>> kratsg at dc:~/d4/poky/build/tmp/work/gfex_prototype2-poky-linux-gnueabi$
>>> pwd
>>> /users/kratsg/d4/poky/build/tmp/work/gfex_prototype2-poky-linux-gnueabi
>>>
>>> also, where would I define it, if I needed to?
>>>
>>> On Tue, Oct 11, 2016 at 12:32 PM Oleg K Dzhimiev <oleg at elphel.com> wrote:
>>>>
>>>> It could be that FAT support is off in SPL. Check
>>>> poky/build/tmp/work/......../spl/u-boot-spl.cfg - it should have at least:
>>>>>
>>>>> #define CONFIG_ZYNQ_SDHCI
>>>>>
>>>>> #define CONFIG_SPL_MMC_SUPPORT
>>>>>
>>>>> #define CONFIG_SPL_FAT_SUPPORT
>>>>
>>>>
>>>> Attaching a copy of mine.
>>>>
>>>> Based on zynq_zc70x.h and zynq-common.h - you need to have
>>>> CONFIG_ZYNQ_SDHCI defined.
>>>>
>>>> On 11 October 2016 at 10:45, Giordon Stark <kratsg at gmail.com> wrote:
>>>>>
>>>>> While we're at it, let me summarize the situation:
>>>>>
>>>>> Using the FSBL method I've documented here
>>>>> (https://github.com/kratsg/meta-l1calo/wiki/Prepare-and-Boot-Hardware#fsbl-method)
>>>>> -- bitbake to generate uImage, uramdisk.image.gz, devicetree.dtb, and
>>>>> u-boot.elf. Then I create fsbl and then boot image using Xilinx SDK, put all
>>>>> these files on the SD card and the SD card boots.
>>>>>
>>>>> If I use the SPL method, I am unable to boot this way with the
>>>>> following error message:
>>>>>
>>>>> U-Boot SPL 2015.04 (Oct 05 2016 - 13:12:31)
>>>>> mmc boot
>>>>> reading fpga.bin
>>>>> spl_load_image_fat: error reading image fpga.bin, err - -1
>>>>> spl: error reading image fpga.bin, err - 1
>>>>> reading system.dtb
>>>>> spl_load_image_fat_os: error reading image system.dtb, err - -1
>>>>> reading u-boot-dtb.img
>>>>> spl_load_image_fat: error reading image u-boot-dtb.img, err - -1
>>>>> ### ERROR ### Please RESET the board ###
>>>>>
>>>>>
>>>>> So at least I know it works via the FSBL method but not the SPL method.
>>>>> My second question is related to a comment you made. Let's say I have a
>>>>> custom ELF that is written to set up / configure the clocks and I need this
>>>>> to run as well. How do I add this in for the FSBL method and for the SPL
>>>>> method? I assume for the FSBL method, I just add this in my boot image and
>>>>> it will load this for me.
>>>>>
>>>>> Giordon
>>>>>
>>>>> On Tue, Oct 11, 2016 at 8:56 AM Giordon Stark <kratsg at gmail.com> wrote:
>>>>>>
>>>>>> Hi,
>>>>>>
>>>>>> Adding u-boot-dtb.img changes nothing according to the engineers
>>>>>> working on the board. They still see the same error message previously
>>>>>> quoted.
>>>>>>
>>>>>> Something else must be off?
>>>>>>
>>>>>> Giordon
>>>>>>
>>>>>> On Tue, Oct 11, 2016 at 12:00 AM Nathan Rossi <nathan at nathanrossi.com>
>>>>>> wrote:
>>>>>>>
>>>>>>> On Tue, Oct 11, 2016 at 1:17 PM, Giordon Stark <kratsg at gmail.com>
>>>>>>> wrote:
>>>>>>>
>>>>>>> > On Mon, Oct 10, 2016 at 9:59 PM Nathan Rossi
>>>>>>> > <nathan at nathanrossi.com> wrote:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> On Tue, Oct 11, 2016 at 12:15 PM, Giordon Stark <kratsg at gmail.com>
>>>>>>> >> wrote:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > Thanks, some elaboration below!
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > On Mon, Oct 10, 2016 at 8:58 PM Nathan Rossi
>>>>>>> >> > <nathan at nathanrossi.com>
>>>>>>>
>>>>>>> >> > wrote:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> On Tue, Oct 11, 2016 at 9:49 AM, Giordon Stark
>>>>>>> >> >> <kratsg at gmail.com>
>>>>>>>
>>>>>>> >> >> wrote:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > Hi,
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > I am using bitbake to build on top of a custom machine [eg:
>>>>>>> >> >> > using my
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > devicetree] and then generating the following files which I
>>>>>>> >> >> > renamed
>>>>>>>
>>>>>>> >> >> > into
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > a
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > format appropriate for meta-xilinx
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > -rwxr-xr-x 1 kratsg  59K Oct  5 17:31 BOOT.BIN
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > -rw-r--r-- 1 kratsg  22K Oct  5 17:30 devicetree.dtb
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > -rw-r--r-- 1 kratsg 3.2M Oct  5 17:30 uImage
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > -rw-r--r-- 1 kratsg  26M Oct  5 17:15 uramdisk.image.gz
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > -rwxr-xr-x 1 kratsg 2.4M Oct  5 17:30 u-boot.elf
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > The machine is defined here:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >> >> >
>>>>>>> >> >> > https://github.com/kratsg/meta-l1calo/blob/master/conf/machine/gfex-prototype2.conf
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > The image I make (bitbake zynq-base) is defined here:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >> >> >
>>>>>>> >> >> > https://github.com/kratsg/meta-l1calo/blob/master/recipes-core/images/zynq-base.bb
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > So i'm hoping this is relatively straightforward. Now I get a
>>>>>>> >> >> > little
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > confused about actually booting this on the board using the
>>>>>>> >> >> > SD Card.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > According to the docs
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> >
>>>>>>> >> >> > (https://github.com/Xilinx/meta-xilinx/blob/master/docs/BOOT.sdcard)
>>>>>>>
>>>>>>> >> >> > it
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > seems that I need to only use four files generated from
>>>>>>> >> >> > bitbake:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > devicetree.dtb, uImage, uramdisk.image.gz, and u-boot.elf;
>>>>>>> >> >> > and then
>>>>>>>
>>>>>>> >> >> > use
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > Xilinx SDK to create an FSBL.elf, use the u-boot.elf from
>>>>>>> >> >> > bitbake,
>>>>>>>
>>>>>>> >> >> > and
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > create a boot image (BOOT.BIN). Why isn't this able to be
>>>>>>> >> >> > done using
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > bitbake? When I try everything without using the Xilinx SDK,
>>>>>>> >> >> > I see
>>>>>>>
>>>>>>> >> >> > the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > error
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> > message [1].
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> Those docs are a bit old, for the last release I re-wrote the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> documentation as README.booting.md in the root of meta-xilinx.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>> >> >> https://github.com/Xilinx/meta-xilinx/blob/master/README.booting.md#loading-via-sd
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > Awesome, I was not aware that the docs were rewritten. I didn't
>>>>>>> >> > even
>>>>>>>
>>>>>>> >> > realize
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > there was a README.booting.md at the top level. Perhaps that can
>>>>>>> >> > be
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > clarified somewhere?
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> It is mentioned in the README, maybe removing the old docs will
>>>>>>> >> remove
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> any confusion?
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> > That might be best! Or perhaps move that new README.booting into
>>>>>>> > the docs
>>>>>>>
>>>>>>> > directory to replace?
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> Also I am not sure about your question regarding boot.bin
>>>>>>> >> >> generation.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> But if you machine provides the ps7_init_gpl* files (your
>>>>>>> >> >> machine is
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> including zc706, so they are available) it is able to build
>>>>>>> >> >> u-boot-spl
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> (which does the same job as FSBL) and wrap that in the boot.bin
>>>>>>> >> >> format
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >> for use. If you need FSBL specifically then that is a separate
>>>>>>> >> >> issue.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > For right now, we are using a custom board with a ZC706. We'll
>>>>>>> >> > move to
>>>>>>>
>>>>>>> >> > the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > Zynq+ in the next generation (as well as bump up versions of
>>>>>>> >> > everything
>>>>>>>
>>>>>>> >> > from
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > Jethro). So I imagine we will always have these ps7_init_gpl
>>>>>>> >> > available
>>>>>>>
>>>>>>> >> > (I
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > imagine you refer to these:
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >> >
>>>>>>> >> > https://github.com/Xilinx/meta-xilinx/tree/master/recipes-bsp/platform-init/platform-init/picozed-zynq7).
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> So ZynqMP is a bit different, there is U-Boot SPL support. However
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> this is not exposed yet in meta-xilinx, but will be in the future.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> The directory you linked has the ps7_init_gpl* files which are
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> specific for the picozed board. The platform-init recipe though
>>>>>>> >> would
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> be one of the ways you can supply the ps7_init for your machine
>>>>>>> >> should
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> you need to. For zc706 the ps7_init_gpl* files are actually in the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> U-Boot source tree
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>> >> (http://git.denx.de/?p=u-boot.git;a=tree;f=board/xilinx/zynq;h=2fc205e4e97071b73a16c00dec1d6804e418343f;hb=HEAD).
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> > I see. Interesting I didn't realize this was in the U-Boot source
>>>>>>> > tree. A
>>>>>>>
>>>>>>> > bit confusing where some files are located, but ok.
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > I do not totally understand how/why this can replace the FSBL
>>>>>>> >> > entirely?
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> >
>>>>>>>
>>>>>>> >> >
>>>>>>> >> > http://www.wiki.xilinx.com/U-Boot+Secondary+Program+Loader#Task%20Description-Build%20U-Boot%20SPL
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > seems to indicate it is not fully supported by Xilinx. In fact,
>>>>>>> >> > I never
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > understood how the FSBL normally worked because I understood the
>>>>>>> >> > process
>>>>>>>
>>>>>>> >> > as
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> > ROM Code -> SPL -> U-BOOT -> Kernel.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> That is the boot flow yes. And correct it is not "supported" by
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> Xilinx, so you cannot expect to contact Xilinx support channels
>>>>>>> >> with
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> regards to SPL. But support for SPL is definitely available in the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> community whether it be here on meta-xilinx or with U-Boot itself.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> > Ok, so it should be possible to boot up boards with Xilinx
>>>>>>> > processors via
>>>>>>>
>>>>>>> > this method, not strictly relying on FSBL, but using SPL.
>>>>>>>
>>>>>>> >
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> FSBL is actually not a very complex program, all of the complex
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> register initialization done for DDR, PLL, etc setup is actually
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> contained in the ps7_init_gpl* code files generated by Vivado (in
>>>>>>> >> the
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> HDF).
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> If you are interested you can actually see the source for FSBL
>>>>>>> >> here
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >>
>>>>>>> >> https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/zynq_fsbl/src.
>>>>>>>
>>>>>>> >>
>>>>>>>
>>>>>>> >> However it is important to note that FSBL is licensed under a
>>>>>>>
>>>>>>> >>

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