[meta-xilinx] [PATCH v2 2/7] kc705-microblazeel: Updates to match v2017.3 bitstream
Nathan Rossi
nathan at nathanrossi.com
Fri Nov 24 05:28:00 PST 2017
Update the device tree and machine configuration to match the updated
bitstream.
The bitstream was updated to v10.0 of the MicroBlaze core although
mainline GCC does not currently support v10.0+. Additionally the design
now enables divide-hard feature support. Memory and device addresses are
unchanged.
Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
---
Changes in v2:
* Added 'reorder' tune feature, as target has these instructions
* Update kernel config fragment to use v10.0 cpu version
---
conf/machine/kc705-microblazeel.conf | 5 +----
.../kc705-microblazeel/kc705-microblazeel.dts | 21 +++++++++++++--------
.../device-tree/files/kc705-microblazeel/pl.dtsi | 22 +++++++++++-----------
.../files/kc705-microblazeel/system-conf.dtsi | 13 +------------
.../bsp/kc705-microblazeel/kc705-microblazeel.cfg | 2 +-
5 files changed, 27 insertions(+), 36 deletions(-)
diff --git a/conf/machine/kc705-microblazeel.conf b/conf/machine/kc705-microblazeel.conf
index 39cb3c2bb5..658b75be70 100644
--- a/conf/machine/kc705-microblazeel.conf
+++ b/conf/machine/kc705-microblazeel.conf
@@ -7,7 +7,7 @@ require conf/machine/include/tune-microblaze.inc
require conf/machine/include/machine-xilinx-default.inc
require conf/machine/include/machine-xilinx-board.inc
-TUNE_FEATURES_tune-microblaze += "v9.6 barrel-shift pattern-compare multiply-high"
+TUNE_FEATURES_tune-microblaze += "v10.0 barrel-shift reorder pattern-compare multiply-high divide-hard"
MACHINE_FEATURES = ""
@@ -18,6 +18,3 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
EXTRA_IMAGEDEPENDS += "virtual/bitstream"
-PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx"
-PREFERRED_VERSION_u-boot-xlnx ?= "v2016.07-xilinx-v2016.4%"
-
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
index af60db8776..45e488c1d1 100644
--- a/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
+++ b/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
@@ -1,11 +1,20 @@
/dts-v1/;
+/include/ "pl.dtsi"
/include/ "system-conf.dtsi"
/ {
+ hard-reset-gpios = <&reset_gpio 0 1>;
+ aliases {
+ ethernet0 = &axi_ethernet;
+ i2c0 = &iic_main;
+ serial0 = &rs232_uart;
+ };
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
};
&iic_main {
- #address-cells = <1>;
- #size-cells = <0>;
i2cswitch at 74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
@@ -39,13 +48,9 @@
&axi_ethernet {
phy-handle = <&phy0>;
axi_ethernet_mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
phy0: phy at 7 {
- compatible = "marvell,88e1111";
device_type = "ethernet-phy";
reg = <7>;
- } ;
- } ;
+ };
+ };
};
-
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
index 8f064671fa..43bc2ab789 100644
--- a/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
+++ b/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
@@ -1,10 +1,3 @@
-/*
- * CAUTION: This file is automatically generated by Xilinx.
- * Version: HSI 2016.3
- * Today is: Tue Sep 13 19:30:07 2016
-*/
-
-
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -18,18 +11,18 @@
bus-handle = <&amba_pl>;
clock-frequency = <200000000>;
clocks = <&clk_cpu>;
- compatible = "xlnx,microblaze-9.6";
+ compatible = "xlnx,microblaze-10.0";
d-cache-baseaddr = <0x0000000080000000>;
d-cache-highaddr = <0x00000000bfffffff>;
d-cache-line-size = <0x20>;
d-cache-size = <0x4000>;
device_type = "cpu";
i-cache-baseaddr = <0x0000000080000000>;
- i-cache-highaddr = <0x00000000BFFFFFFF>;
+ i-cache-highaddr = <0x00000000bfffffff>;
i-cache-line-size = <0x10>;
i-cache-size = <0x4000>;
interrupt-handle = <µblaze_0_axi_intc>;
- model = "microblaze,9.6";
+ model = "microblaze,10.0";
timebase-frequency = <200000000>;
xlnx,addr-size = <0x20>;
xlnx,addr-tag-bits = <0x10>;
@@ -63,6 +56,7 @@
xlnx,debug-interface = <0x0>;
xlnx,debug-latency-counters = <0x1>;
xlnx,debug-profile-size = <0x0>;
+ xlnx,debug-trace-async-reset = <0x0>;
xlnx,debug-trace-size = <0x2000>;
xlnx,div-zero-exception = <0x1>;
xlnx,dp-axi-mon = <0x0>;
@@ -106,12 +100,14 @@
xlnx,num-sync-ff-clk-debug = <0x2>;
xlnx,num-sync-ff-clk-irq = <0x1>;
xlnx,num-sync-ff-dbg-clk = <0x1>;
+ xlnx,num-sync-ff-dbg-trace-clk = <0x2>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x0>;
xlnx,number-of-wr-addr-brk = <0x0>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,optimization = <0x0>;
xlnx,pc-width = <0x20>;
+ xlnx,piaddr-size = <0x20>;
xlnx,pvr = <0x2>;
xlnx,pvr-user1 = <0x00>;
xlnx,pvr-user2 = <0x00000000>;
@@ -181,11 +177,14 @@
xlnx = <0x0>;
xlnx,axiliteclkrate = <0x0>;
xlnx,axisclkrate = <0x0>;
+ xlnx,clockselection = <0x0>;
xlnx,enableasyncsgmii = <0x0>;
xlnx,gt-type = <0x0>;
xlnx,gtinex = <0x0>;
xlnx,gtlocation = <0x0>;
xlnx,gtrefclksrc = <0x0>;
+ xlnx,include-dre ;
+ xlnx,instantiatebitslice0 = <0x0>;
xlnx,phy-type = <0x1>;
xlnx,phyaddr = <0x1>;
xlnx,rable = <0x0>;
@@ -193,7 +192,7 @@
xlnx,rxlane0-placement = <0x0>;
xlnx,rxlane1-placement = <0x0>;
xlnx,rxmem = <0x1000>;
- xlnx,rxnibblebitslice0used = <0x1>;
+ xlnx,rxnibblebitslice0used = <0x0>;
xlnx,tx-in-upper-nibble = <0x1>;
xlnx,txcsum = <0x0>;
xlnx,txlane0-placement = <0x0>;
@@ -214,6 +213,7 @@
interrupt-parent = <µblaze_0_axi_intc>;
interrupts = <3 2 2 2>;
reg = <0x41e00000 0x10000>;
+ xlnx,include-dre ;
};
axi_timer_0: timer at 41c00000 {
clock-frequency = <200000000>;
diff --git a/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
index 2a824aecb5..09b26c6ad4 100644
--- a/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
+++ b/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
@@ -5,23 +5,12 @@
/ {
- model = "Xilinx-KC705-AXI-full-2016.3";
- hard-reset-gpios = <&reset_gpio 0 1>;
- aliases {
- serial0 = &rs232_uart;
- ethernet0 = &axi_ethernet;
- };
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
- stdout-path = "serial0:115200ns";
- };
- memory {
- device_type = "memory";
- reg = <0x80000000 0x40000000>;
+ stdout-path = "serial0:115200n8";
};
};
-/include/ "pl.dtsi"
&axi_ethernet {
local-mac-address = [00 0a 35 00 22 01];
};
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg
index 48ea0a0995..bf7f316a8d 100644
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg
+++ b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg
@@ -7,7 +7,7 @@ CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
-CONFIG_XILINX_MICROBLAZE0_HW_VER="9.6"
+CONFIG_XILINX_MICROBLAZE0_HW_VER="10.0"
# Memory Base Address
CONFIG_KERNEL_BASE_ADDR=0x80000000
--
2.15.0
More information about the meta-xilinx
mailing list