[meta-xilinx] [PATCH 4/7] gcc-source_7.%.bbappend: Update/add patches for GCC 7
Nathan Rossi
nathan at nathanrossi.com
Wed Oct 4 07:41:46 PDT 2017
Update existing patches for GCC 7 (and use backports where available),
and drop merged patches whilst adding some additional patches to fix
specific bugs.
Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
---
.../Enable-DWARF-exception-handling-support.patch | 167 ---------------------
...microblaze-Make-r21-fixed-due-to-Linux-AB.patch | 48 ------
recipes-microblaze/gcc/gcc-7/0001-Revert.patch | 42 ++++++
...d-Improve-adddi3-and-subdi3-insn-definit.patch} | 13 +-
...sync.md-Correct-behaviour-and-define-side.patch | 76 ++++++++++
...microblaze-Use-default-ident-output-gener.patch | 80 ++++++++++
recipes-microblaze/gcc/gcc-source_6.%.bbappend | 9 --
recipes-microblaze/gcc/gcc-source_7.%.bbappend | 9 ++
8 files changed, 214 insertions(+), 230 deletions(-)
delete mode 100644 recipes-microblaze/gcc/files/Enable-DWARF-exception-handling-support.patch
delete mode 100644 recipes-microblaze/gcc/files/gcc-config-microblaze-Make-r21-fixed-due-to-Linux-AB.patch
create mode 100644 recipes-microblaze/gcc/gcc-7/0001-Revert.patch
rename recipes-microblaze/gcc/{files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch => gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch} (91%)
create mode 100644 recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch
create mode 100644 recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch
delete mode 100644 recipes-microblaze/gcc/gcc-source_6.%.bbappend
create mode 100644 recipes-microblaze/gcc/gcc-source_7.%.bbappend
diff --git a/recipes-microblaze/gcc/files/Enable-DWARF-exception-handling-support.patch b/recipes-microblaze/gcc/files/Enable-DWARF-exception-handling-support.patch
deleted file mode 100644
index 4a16d2f7a0..0000000000
--- a/recipes-microblaze/gcc/files/Enable-DWARF-exception-handling-support.patch
+++ /dev/null
@@ -1,167 +0,0 @@
-From 7a9ef06991e293be4d5ef2be1d9716a31f90447e Mon Sep 17 00:00:00 2001
-From: "Edgar E. Iglesias" <edgar.iglesias at gmail.com>
-Date: Mon, 18 Jun 2012 20:18:13 +0200
-Subject: [PATCH] Enable DWARF exception handling support.
-
-Changelog
-
-2013-03-18 Edgar E. Iglesias <edgar.iglesias at xilinx.com>
- David Holsgrove <david.holsgrove at xilinx.com>
-
- * common/config/microblaze/microblaze-common.c: Remove
- TARGET_EXCEPT_UNWIND_INFO definition.
- * config/microblaze/microblaze-protos.h: Add
- microblaze_eh_return prototype.
- * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
- microblaze_expand_epilogue, microblaze_return_addr): Handle
- calls_eh_return
- (microblaze_eh_return): New function.
- * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
- EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
- ASM_PREFERRED_EH_DATA_FORMAT
- * gcc/config/microblaze/microblaze.md: Define eh_return pattern.
-
-Signed-off-by: David Holsgrove <david.holsgrove at xilinx.com>
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias at gmail.com>
----
- gcc/common/config/microblaze/microblaze-common.c | 3 ---
- gcc/config/microblaze/microblaze-protos.h | 1 +
- gcc/config/microblaze/microblaze.c | 29 ++++++++++++++++++++----
- gcc/config/microblaze/microblaze.h | 15 ++++++++++++
- gcc/config/microblaze/microblaze.md | 11 +++++++++
- 5 files changed, 52 insertions(+), 7 deletions(-)
-
-diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index f369bc58d1..0e1bdc4f58 100644
---- a/gcc/common/config/microblaze/microblaze-common.c
-+++ b/gcc/common/config/microblaze/microblaze-common.c
-@@ -37,7 +37,4 @@ static const struct default_options microblaze_option_optimization_table[] =
- #undef TARGET_OPTION_OPTIMIZATION_TABLE
- #define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table
-
--#undef TARGET_EXCEPT_UNWIND_INFO
--#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
--
- struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
-diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 1cfaf08c1c..cc3b4619c4 100644
---- a/gcc/config/microblaze/microblaze-protos.h
-+++ b/gcc/config/microblaze/microblaze-protos.h
-@@ -57,6 +57,7 @@ extern bool microblaze_tls_referenced_p (rtx);
- extern int symbol_mentioned_p (rtx);
- extern int label_mentioned_p (rtx);
- extern bool microblaze_cannot_force_const_mem (machine_mode, rtx);
-+extern void microblaze_eh_return (rtx op0);
- #endif /* RTX_CODE */
-
- /* Declare functions in microblaze-c.c. */
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index baff67a89c..71f1495bae 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -1924,6 +1924,11 @@ microblaze_must_save_register (int regno)
- if (frame_pointer_needed && (regno == HARD_FRAME_POINTER_REGNUM))
- return 1;
-
-+ if (crtl->calls_eh_return
-+ && regno == MB_ABI_SUB_RETURN_ADDR_REGNUM) {
-+ return 1;
-+ }
-+
- if (!crtl->is_leaf)
- {
- if (regno == MB_ABI_SUB_RETURN_ADDR_REGNUM)
-@@ -1951,6 +1956,13 @@ microblaze_must_save_register (int regno)
- return 1;
- }
-
-+ if (crtl->calls_eh_return
-+ && (regno == EH_RETURN_DATA_REGNO (0)
-+ || regno == EH_RETURN_DATA_REGNO (1)))
-+ {
-+ return 1;
-+ }
-+
- return 0;
- }
-
-@@ -3027,6 +3039,12 @@ microblaze_expand_epilogue (void)
- emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx));
- }
-
-+ if (crtl->calls_eh_return)
-+ emit_insn (gen_addsi3 (stack_pointer_rtx,
-+ stack_pointer_rtx,
-+ gen_rtx_REG (SImode,
-+ MB_EH_STACKADJ_REGNUM)));
-+
- emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
- MB_ABI_SUB_RETURN_ADDR_REGNUM)));
- }
-@@ -3324,10 +3342,13 @@ microblaze_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
- if (count != 0)
- return NULL_RTX;
-
-- return gen_rtx_PLUS (Pmode,
-- get_hard_reg_initial_val (Pmode,
-- MB_ABI_SUB_RETURN_ADDR_REGNUM),
-- GEN_INT (8));
-+ return get_hard_reg_initial_val (Pmode,
-+ MB_ABI_SUB_RETURN_ADDR_REGNUM);
-+}
-+
-+void microblaze_eh_return (rtx op0)
-+{
-+ emit_insn (gen_movsi(gen_rtx_MEM(Pmode, stack_pointer_rtx), op0));
- }
-
- /* Queue an .ident string in the queue of top-level asm statements.
-diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index e115c42839..4b0662024b 100644
---- a/gcc/config/microblaze/microblaze.h
-+++ b/gcc/config/microblaze/microblaze.h
-@@ -184,6 +184,21 @@ extern enum pipeline_type microblaze_pipe;
- #define INCOMING_RETURN_ADDR_RTX \
- gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
-
-+/* Specifies the offset from INCOMING_RETURN_ADDR_RTX and the actual return PC. */
-+#define RETURN_ADDR_OFFSET (8)
-+
-+/* Describe how we implement __builtin_eh_return. */
-+#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? MB_ABI_FIRST_ARG_REGNUM + (N) : INVALID_REGNUM)
-+
-+#define MB_EH_STACKADJ_REGNUM MB_ABI_INT_RETURN_VAL2_REGNUM
-+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, MB_EH_STACKADJ_REGNUM)
-+
-+/* Select a format to encode pointers in exception handling data. CODE
-+ is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
-+ true if the symbol may be affected by dynamic relocations. */
-+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
-+ ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
-+
- /* Use DWARF 2 debugging information by default. */
- #define DWARF2_DEBUGGING_INFO
- #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 85776237c1..b388d25741 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -2324,4 +2324,15 @@
- (set_attr "mode" "SI")
- (set_attr "length" "4")])
-
-+; This is used in compiling the unwind routines.
-+(define_expand "eh_return"
-+ [(use (match_operand 0 "general_operand" ""))]
-+ ""
-+ "
-+{
-+ microblaze_eh_return(operands[0]);
-+ DONE;
-+}")
-+
- (include "sync.md")
-+
---
-2.9.3
-
diff --git a/recipes-microblaze/gcc/files/gcc-config-microblaze-Make-r21-fixed-due-to-Linux-AB.patch b/recipes-microblaze/gcc/files/gcc-config-microblaze-Make-r21-fixed-due-to-Linux-AB.patch
deleted file mode 100644
index 373b158ad3..0000000000
--- a/recipes-microblaze/gcc/files/gcc-config-microblaze-Make-r21-fixed-due-to-Linux-AB.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 3a73b9abccefa81cdee4cdf28f8b3b8fb0ed6c6e Mon Sep 17 00:00:00 2001
-From: Nathan Rossi <nathan at nathanrossi.com>
-Date: Tue, 27 Sep 2016 04:14:50 +1000
-Subject: [PATCH] gcc/config/microblaze: Make r21 fixed due to Linux ABI
-
-Commit 6dcad60c0ef48af584395a40feeb256fb82986a8 introduced a change to
-how the r20 and r21 registers are handled for MicroBlaze. Specifically
-removing the fixed nature of the r21 register.
-
-In the Linux ABI the r21 register is reserved as a fixed register for
-the purposes of storing a pointer to the thread related object. This is
-of particular importance for libc (glibc and musl) which use this
-register and expect it to be fixed for this purpose.
-
-GCC uses the r20 register for GOT pointing. This commit mentioned above
-confusingly states it preserved the fixed nature but in fact changes r20
-to be non-fixed. This patch fixes that up.
-
-Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
-Upstream-Status: Pending
----
- gcc/config/microblaze/microblaze.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index dbfb6522c7..e115c42839 100644
---- a/gcc/config/microblaze/microblaze.h
-+++ b/gcc/config/microblaze/microblaze.h
-@@ -253,14 +253,14 @@ extern enum pipeline_type microblaze_pipe;
- #define FIXED_REGISTERS \
- { \
- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
-- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 1, 1, 1, 1 \
- }
-
- #define CALL_USED_REGISTERS \
- { \
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-- 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 1, 1, 1, 1 \
- }
- #define GP_REG_FIRST 0
---
-2.9.3
-
diff --git a/recipes-microblaze/gcc/gcc-7/0001-Revert.patch b/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
new file mode 100644
index 0000000000..8501bd87b8
--- /dev/null
+++ b/recipes-microblaze/gcc/gcc-7/0001-Revert.patch
@@ -0,0 +1,42 @@
+From cd395cbdaa551924459d6ecf143cb8e4a5771f2f Mon Sep 17 00:00:00 2001
+From: eager <eager at 138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Sat, 27 May 2017 18:29:40 +0000
+Subject: [PATCH 1/4] Revert: 2016-01-21 Ajit Agarwal
+ <ajitkum at xilinx.com>
+
+ See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html.
+
+ * config/microblaze/microblaze.h
+ (FIXED_REGISTERS): Update in macro.
+ (CALL_USED_REGISTERS): Update in macro.
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248540 138bc75d-0d04-0410-961f-82ee72b054a4
+Upstream-Status: Backport [from post gcc-7]
+---
+ gcc/config/microblaze/microblaze.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
+index 66e4ef5c3d..2c9ece1d6c 100644
+--- a/gcc/config/microblaze/microblaze.h
++++ b/gcc/config/microblaze/microblaze.h
+@@ -269,14 +269,14 @@ extern enum pipeline_type microblaze_pipe;
+ #define FIXED_REGISTERS \
+ { \
+ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
+- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
++ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 1, 1, 1, 1 \
+ }
+
+ #define CALL_USED_REGISTERS \
+ { \
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+- 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
++ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 1, 1, 1, 1 \
+ }
+ #define GP_REG_FIRST 0
+--
+2.11.0
+
diff --git a/recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch b/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
similarity index 91%
rename from recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
rename to recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
index 446ff47d5c..9aa5d98af7 100644
--- a/recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
+++ b/recipes-microblaze/gcc/gcc-7/0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch
@@ -1,7 +1,8 @@
-From ba9d2df1fa18243bd9fd77e499caa0224a1a13bc Mon Sep 17 00:00:00 2001
+From db7a0ac634ccaa1781d0a0d17dfffd3f1719bb6d Mon Sep 17 00:00:00 2001
From: Nathan Rossi <nathan at nathanrossi.com>
Date: Thu, 12 Nov 2015 16:09:31 +1000
-Subject: [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' insn definitions
+Subject: [PATCH 2/4] microblaze.md: Improve 'adddi3' and 'subdi3' insn
+ definitions
Change adddi3 to handle DI immediates as the second operand, this
requires modification to the output template however reduces the need to
@@ -26,10 +27,10 @@ Upstream-Status: Unsubmitted
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 67e509c..1ab10b7 100644
+index b3a0011fd7..8a372d7ebb 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
-@@ -480,17 +480,16 @@
+@@ -483,17 +483,16 @@
;; Adding 2 DI operands in register or reg/imm
(define_insn "adddi3"
@@ -52,7 +53,7 @@ index 67e509c..1ab10b7 100644
;;----------------------------------------------------------------
;; Subtraction
-@@ -516,7 +515,7 @@
+@@ -530,7 +529,7 @@
(define_insn "subdi3"
[(set (match_operand:DI 0 "register_operand" "=&d")
(minus:DI (match_operand:DI 1 "register_operand" "d")
@@ -62,5 +63,5 @@ index 67e509c..1ab10b7 100644
"rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1"
[(set_attr "type" "darith")
--
-2.6.2
+2.11.0
diff --git a/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch b/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch
new file mode 100644
index 0000000000..9336291ba3
--- /dev/null
+++ b/recipes-microblaze/gcc/gcc-7/0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch
@@ -0,0 +1,76 @@
+From 6c7a10a9e077d0221cc9a6c5f5a6365815c1dca4 Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan at nathanrossi.com>
+Date: Mon, 12 Jun 2017 00:28:42 +1000
+Subject: [PATCH 3/4] microblaze/sync.md: Correct behaviour and define
+ side-effects
+
+This change corrects the behaviour with regards to the bool output.
+Previously the definition would set the bool operand to true (non-zero)
+on failure, specifically at the 'cmp' against the expected operand which
+would be set non-zero when the memory != expected value. Instead of
+using the bool operand as the compare result use the clobbered %8
+operand for temporary comparison result and set the bool operand at the
+end of the definition to true (in this case the immediate value of 1).
+Also to ensure that the bool operand is 0 in all other cases the first
+instruction which is intended as a clear of the carry bit is reused to
+set the bool operand to 0 at the same time as clearing the carry bit.
+And finally the jump offsets were updated
+
+Additional to the behaviour change this change defines the side-effects
+of the atomic_compare_and_swap. Specifically the side effects where the
+bool and val operands are modified/set based on the value of the memory
+content. This prevents certain optimization behaviour from incorrectly
+optimizing away code. An example of this is the snippet below, where in
+certain cases the comparison is optimized away entirely.
+
+ mem = 2;
+ if (atomic_compare_and_swap(&mem, ...) == 2)
+ ...
+
+Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
+Upstream-Status: Unsubmitted
+---
+ gcc/config/microblaze/sync.md | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
+index 8125bd8d63..605a9a969e 100644
+--- a/gcc/config/microblaze/sync.md
++++ b/gcc/config/microblaze/sync.md
+@@ -18,9 +18,10 @@
+ ;; <http://www.gnu.org/licenses/>.
+
+ (define_insn "atomic_compare_and_swapsi"
+- [(match_operand:SI 0 "register_operand" "=&d") ;; bool output
+- (match_operand:SI 1 "register_operand" "=&d") ;; val output
+- (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory
++ [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output
++ (match_operand:SI 2 "nonimmediate_operand" "+Q")) ;; memory
++ (set (match_operand:SI 1 "register_operand" "=&d") ;; val output
++ (match_dup 2))
+ (match_operand:SI 3 "register_operand" "d") ;; expected value
+ (match_operand:SI 4 "register_operand" "d") ;; desired value
+ (match_operand:SI 5 "const_int_operand" "") ;; is_weak
+@@ -29,15 +30,16 @@
+ (clobber (match_scratch:SI 8 "=&d"))]
+ ""
+ {
+- output_asm_insn ("addc \tr0,r0,r0", operands);
++ output_asm_insn ("add \t%0,r0,r0", operands);
+ output_asm_insn ("lwx \t%1,%y2,r0", operands);
+ output_asm_insn ("addic\t%8,r0,0", operands);
+ output_asm_insn ("bnei \t%8,.-8", operands);
+- output_asm_insn ("cmp \t%0,%1,%3", operands);
+- output_asm_insn ("bnei \t%0,.+16", operands);
++ output_asm_insn ("cmp \t%8,%1,%3", operands);
++ output_asm_insn ("bnei \t%8,.+20", operands);
+ output_asm_insn ("swx \t%4,%y2,r0", operands);
+ output_asm_insn ("addic\t%8,r0,0", operands);
+ output_asm_insn ("bnei \t%8,.-28", operands);
++ output_asm_insn ("addi \t%0,r0,1", operands);
+ return "";
+ }
+ )
+--
+2.11.0
+
diff --git a/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch b/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch
new file mode 100644
index 0000000000..3b8a2f5df5
--- /dev/null
+++ b/recipes-microblaze/gcc/gcc-7/0004-gcc-config-microblaze-Use-default-ident-output-gener.patch
@@ -0,0 +1,80 @@
+From 308ac81945b2674953797a9db4aee98397f88362 Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan at nathanrossi.com>
+Date: Sat, 27 May 2017 00:00:17 +1000
+Subject: [PATCH 4/4] gcc/config/microblaze: Use default ident output
+ generation
+
+Remove the MicroBlaze specific TARGET_ASM_OUTPUT_IDENT definition, and
+use the default.
+
+Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
+Upstream-Status: Unsubmitted
+---
+ gcc/config/microblaze/microblaze-protos.h | 1 -
+ gcc/config/microblaze/microblaze.c | 24 ------------------------
+ gcc/config/microblaze/microblaze.h | 2 +-
+ 3 files changed, 1 insertion(+), 26 deletions(-)
+
+diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
+index 9ba8f2d46f..b56e052ae4 100644
+--- a/gcc/config/microblaze/microblaze-protos.h
++++ b/gcc/config/microblaze/microblaze-protos.h
+@@ -51,7 +51,6 @@ extern int microblaze_regno_ok_for_base_p (int, int);
+ extern HOST_WIDE_INT microblaze_initial_elimination_offset (int, int);
+ extern void microblaze_declare_object (FILE *, const char *, const char *,
+ const char *, int);
+-extern void microblaze_asm_output_ident (const char *);
+ extern int microblaze_legitimate_pic_operand (rtx);
+ extern bool microblaze_tls_referenced_p (rtx);
+ extern int symbol_mentioned_p (rtx);
+diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
+index d0f86fd460..bba6983b65 100644
+--- a/gcc/config/microblaze/microblaze.c
++++ b/gcc/config/microblaze/microblaze.c
+@@ -3351,30 +3351,6 @@ microblaze_eh_return (rtx op0)
+ emit_insn (gen_movsi (gen_rtx_MEM (Pmode, stack_pointer_rtx), op0));
+ }
+
+-/* Queue an .ident string in the queue of top-level asm statements.
+- If the string size is below the threshold, put it into .sdata2.
+- If the front-end is done, we must be being called from toplev.c.
+- In that case, do nothing. */
+-void
+-microblaze_asm_output_ident (const char *string)
+-{
+- const char *section_asm_op;
+- int size;
+- char *buf;
+-
+- if (symtab->state != PARSING)
+- return;
+-
+- size = strlen (string) + 1;
+- if (size <= microblaze_section_threshold)
+- section_asm_op = SDATA2_SECTION_ASM_OP;
+- else
+- section_asm_op = READONLY_DATA_SECTION_ASM_OP;
+-
+- buf = ACONCAT ((section_asm_op, "\n\t.ascii \"", string, "\\0\"\n", NULL));
+- symtab->finalize_toplevel_asm (build_string (strlen (buf), buf));
+-}
+-
+ static void
+ microblaze_elf_asm_init_sections (void)
+ {
+diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
+index 2c9ece1d6c..ccd77e8b4d 100644
+--- a/gcc/config/microblaze/microblaze.h
++++ b/gcc/config/microblaze/microblaze.h
+@@ -743,7 +743,7 @@ do { \
+ #define STRING_ASM_OP "\t.asciz\t"
+
+ #undef TARGET_ASM_OUTPUT_IDENT
+-#define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident
++#define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive
+
+ /* Default to -G 8 */
+ #ifndef MICROBLAZE_DEFAULT_GVALUE
+--
+2.11.0
+
diff --git a/recipes-microblaze/gcc/gcc-source_6.%.bbappend b/recipes-microblaze/gcc/gcc-source_6.%.bbappend
deleted file mode 100644
index b3e8c07113..0000000000
--- a/recipes-microblaze/gcc/gcc-source_6.%.bbappend
+++ /dev/null
@@ -1,9 +0,0 @@
-
-# Add MicroBlaze Patches
-FILESEXTRAPATHS_append := "${THISDIR}/files:"
-SRC_URI_append = " \
- file://microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \
- file://gcc-config-microblaze-Make-r21-fixed-due-to-Linux-AB.patch \
- file://Enable-DWARF-exception-handling-support.patch \
- "
-
diff --git a/recipes-microblaze/gcc/gcc-source_7.%.bbappend b/recipes-microblaze/gcc/gcc-source_7.%.bbappend
new file mode 100644
index 0000000000..5b6956381a
--- /dev/null
+++ b/recipes-microblaze/gcc/gcc-source_7.%.bbappend
@@ -0,0 +1,9 @@
+# Add MicroBlaze Patches (only when using MicroBlaze)
+FILESEXTRAPATHS_append_microblaze := "${THISDIR}/gcc-7:"
+SRC_URI_append_microblaze = " \
+ file://0001-Revert.patch \
+ file://0002-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \
+ file://0003-microblaze-sync.md-Correct-behaviour-and-define-side.patch \
+ file://0004-gcc-config-microblaze-Use-default-ident-output-gener.patch \
+ "
+
--
2.14.2
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