[meta-xilinx] Zedboard - I'm not eble to set i2c on PS

[Luca Ceresoli]

Hi Jek,

On 25/06/19 11:00, Jek F. wrote:
> Hi, i'm a beginner and an autodidact. This is my first post here.
> I'm trying to address i2c on Zedboard PS without luck, using Vivado, SDK
> and Yocto Project.
> 
> My current situation is:
> 
> With Vivado:
> 
> 1) Create Project -> RTL Project
> 
> 2) Create block design -> Add IP -> ZYNQ7 Processing System
> 
> 3) Run Block Automation
> 
> 4) In "MIO Configuration" i enabled i2c0 on "MIO 10 11" and i2c1 on "MIO
> 12 13", i clicked on "Create HDL Wrapper..." and then i generated the
> bitstream
> 
> 5) File -> Export -> Export Hardware -> Include bitstream -> Launch SDK
>     - then i converted the bitstream .bit in .bin (fpga.bin) with an
> external tool
> 
> 6) In SDK i generate new board support package
>     - File -> New -> Board Support Package -> device tree (for this i
> downloaded a plugin to generate DTS)
>     - Then i choose kernel 2018.3.
>     - This generated these files: pcw.dtsi, skeleton.dtsi, system.dts,
> system-top.dts, zynq-7000.dtsi
> 
> With yocto:
> 
> 1)I've cloned yocto project (poky 2.6.2 thud)
> 
> 2)I've cloned layer meta-openembedded and meta-xilinx.
> 
> I've modified then file bblayers.conf adding in it:
>     /home/jksandek/poky/meta-openembedded/meta-oe \
>     /home/jksandek/poky/meta-xilinx/meta-xilinx-bsp \
> 
> 3) I've added the file local.conf
>     MACHINE ??= "zedboard-zynq7"
>     ...
>     IMAGE_INSTALL_append = " rsync"
>     IMAGE_INSTALL_append = " busybox"
>     IMAGE_INSTALL_append = " openssh"
>     IMAGE_INSTALL_append = " nano"
>     IMAGE_INSTALL_append = " i2c-tools"
>     ENABLE_I2C = "1"
>     INHERIT += "rm_work"
> 
> 4) Then i have created a new layer "meta-dts" with the following folder
> tree:
> 
>     meta-dts
>     ├── conf
>     │     └── layer.conf
>     ├── COPYING.MIT
>     └── recipes-kernel
>            └── linux
>                    ├── linux-xlnx
>                    │      ├── myconfig.cfg
>                    │      └── zedboard-zynq7
>                    │            ├── pcw.dtsi
>                    │            ├── skeleton.dtsi
>                    │            ├── system.dts
>                    │            ├── system-top.dts
>                    │            └── zynq-7000.dtsi
>                    └── linux-xlnx_%.bbappend
>    
>     -in "linux-xlnx_%.bbappend" i inserted:
>    
>     SRC_URI += "file://system-top.dts;subdir=git/arch/${ARCH}/boot/dts"
>     SRC_URI += "file://pcw.dtsi;subdir=git/arch/${ARCH}/boot/dts"
>     SRC_URI += "file://zynq-7000.dtsi;subdir=git/arch/${ARCH}/boot/dts"
>     SRC_URI_append += "file://myconfig.cfg"
> 
>     -in "myconfig.cfg" i inserted:
>    
>     CONFIG_I2C_XILINX=y
>     XILINX_I2C=y
>     I2C_CADENCE=y
>     CONFIG_I2C=y
> 
> 5) Then i added this layer in bblayers.conf
> 
> 6) Start bitbake with:
>     - bitbake core-image-minimal
> 
> 7) At the end of the bitbake i've added the following files in the SD
> BOOT partition
>     - boot.bin
>     - fpga.bin
>     - system-top.dtb
>     - u-boot.img
>     - uImage
>     - uEnv.txt
> 
> 8) In the rootfs partition i've added and unzipped the following file:
>     - core-image-minimal-zedboard-zynq7.tar.gz
> 
> 9) At the end i started the zedboard and once i logged in i've typed:
>     - i2cdetect -r -y 0
> 
> 
>     but this return something like:
> 
>     root at zynq:~# i2cdetect -y -r 0
>     0 1 2 3 4 5 6 7 8 9 a b c d e f
>     00: cdns-i2c e0004000.ps7-i2c: timeout waiting on completion
>     -- cdns-i2c e0004000.ps7-i2c: timeout waiting on completion

On the software side Linux knows about your controller, this looks good.
But does the hardware (including FPGA) do what you expect?

First things first: check that the i2c controller really exists in FPGA.
devmem2 is the simplest tool to do it: try to read registers at
0xe0004000 + the offsets in the i2c controller datasheet. Do you read
the values expected according to the datasheet?

"timeout waiting on completion" suggests nobody is pulling the line
high. What is connected on the MIO 10 and 11 pins? Is there a pull-up
resistor there?

Then check if the lines are actually at the intended electrical levels:
 - SCL+SDA high when idle (a multimeter is enough here)
 - change low/high when in use, at the expected frequency (possibly
   with an oscilloscope, but a logical analyzer is quite OK as well)
 - have reasonably steep rising edges when in use (with an oscilloscope)

I hope it helps,
-- 
Luca