[linux-yocto] [PATCH 05/39] arch/arm/mach-axxia: Updated Device Tree for Emulation
Charlie Paul
cpaul.windriver at gmail.com
Fri Apr 11 14:13:06 PDT 2014
From: John Jacques <john.jacques at lsi.com>
Added device tree support for the latest GIC driver.
In some cases, it is necessary to distinguish between simulation,
emulation, and hardware systems. Simulation already had a different
name (lsi,axm5516-sim). This patch gives emulation a different name
as well (lsi,axm5516-emu).
Signed-off-by: John Jacques <john.jacques at lsi.com>
---
arch/arm/boot/dts/axm55xxemu.dts | 33 ++----
arch/arm/boot/dts/axm55xxemu7.dts | 226 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/axm55xxsim16.dts | 2 +-
3 files changed, 235 insertions(+), 26 deletions(-)
create mode 100644 arch/arm/boot/dts/axm55xxemu7.dts
diff --git a/arch/arm/boot/dts/axm55xxemu.dts b/arch/arm/boot/dts/axm55xxemu.dts
index d95af00..7c0802a 100644
--- a/arch/arm/boot/dts/axm55xxemu.dts
+++ b/arch/arm/boot/dts/axm55xxemu.dts
@@ -1,5 +1,5 @@
/*
- * arch/arm/boot/dts/axm5500-sim.dts
+ * arch/arm/boot/dts/axm55xxemu.dts
*
* Copyright (C) 2012 LSI
*
@@ -24,7 +24,7 @@
/ {
model = "AXM5516";
- compatible = "arm", "lsi,axm5516";
+ compatible = "arm", "lsi,axm5516-emu";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -46,6 +46,7 @@
compatible = "arm,cortex-a15";
reg = <0>;
cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
};
cpu at 1 {
@@ -53,6 +54,7 @@
compatible = "arm,cortex-a15";
reg = <1>;
cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
};
cpu at 2 {
@@ -60,6 +62,7 @@
compatible = "arm,cortex-a15";
reg = <2>;
cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
};
cpu at 3 {
@@ -67,30 +70,8 @@
compatible = "arm,cortex-a15";
reg = <3>;
cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
};
-
- /*
- cpu at 4 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <4>;
- cpu-release-addr = <0>; // Fixed by the boot loader
- };
-
- cpu at 5 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <5>;
- cpu-release-addr = <0>; // Fixed by the boot loader
- };
-
- cpu at 6 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <6>;
- cpu-release-addr = <0>; // Fixed by the boot loader
- };
- */
};
clocks {
@@ -122,6 +103,8 @@
interrupt-controller;
reg = <0x20 0x01001000 0 0x1000>, /* gic dist base */
<0x20 0x01002000 0 0x100>, /* gic cpu base */
+ <0x20 0x01004000 0 0x2000>, /* vgic control */
+ <0x20 0x01006000 0 0x2000>, /* vgic cpu base */
<0x20 0x10030000 0 0x100>, /* axm IPI mask reg base */
<0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */
};
diff --git a/arch/arm/boot/dts/axm55xxemu7.dts b/arch/arm/boot/dts/axm55xxemu7.dts
new file mode 100644
index 0000000..56375c1
--- /dev/null
+++ b/arch/arm/boot/dts/axm55xxemu7.dts
@@ -0,0 +1,226 @@
+/*
+ * arch/arm/boot/dts/axm55xxemu7.dts
+ *
+ * Copyright (C) 2012 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/ {
+ model = "AXM5516";
+ compatible = "arm", "lsi,axm5516-emu";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ chosen { };
+
+ aliases {
+ serial0 = &axxia_serial0;
+ timer = &axxia_timers;
+ ethernet0 = &axxia_femac0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <0>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <2>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <3>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 4 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <4>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 5 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <5>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+
+ cpu at 6 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <6>;
+ cpu-release-addr = <0>; // Fixed by the boot loader
+ clock-frequency= <0>; // Placeholder
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu {
+ frequency = <0>; /* Filled in by the boot loader. */
+ };
+
+ peripheral {
+ frequency = <0>; /* Filled in by the boot loader. */
+ };
+
+ emmc {
+ frequency = <0>; /* Filled in by the boot loader. */
+ };
+ };
+
+ memory at 00000000 {
+ device_type = "memory";
+ reg = <0 0x00000000 0 0x10000000>;
+ };
+
+ gic: interrupt-controller at 2001001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x20 0x01001000 0 0x1000>, /* gic dist base */
+ <0x20 0x01002000 0 0x100>, /* gic cpu base */
+ <0x20 0x01004000 0 0x2000>, /* vgic control */
+ <0x20 0x01006000 0 0x2000>, /* vgic cpu base */
+ <0x20 0x10030000 0 0x100>, /* axm IPI mask reg base */
+ <0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>;
+ };
+
+
+ gpdma at 2020140000 {
+ compatible = "lsi,dma32";
+ reg = <0x20 0x20140000 0x00 0x1000>;
+ interrupts = <0 60 4>, /* busy */
+ <0 61 4>; /* error */
+
+ channel0 {
+ interrupts = <0 62 4>;
+ };
+
+ channel1 {
+ interrupts = <0 63 4>;
+ };
+ };
+
+ gpdma at 2020141000 {
+ status = "disabled";
+ compatible = "lsi,dma32";
+ reg = <0x20 0x20141000 0x00 0x1000>;
+ interrupts = <0 64 4>, /* busy */
+ <0 65 4>; /* error */
+
+ channel0 {
+ interrupts = <0 66 4>;
+ };
+
+ channel1 {
+ interrupts = <0 67 4>;
+ };
+ };
+
+ gpreg at 2010094000 {
+ compatible = "lsi,gpreg";
+ reg = <0x20 0x10094000 0 0x1000>;
+ };
+
+ axxia_femac0: femac at 0x2010120000 {
+ compatible = "acp-femac";
+ device_type = "network";
+ reg = <0x20 0x10120000 0 0x1000>,
+ <0x20 0x10121000 0 0x1000>,
+ <0x20 0x10122000 0 0x1000>;
+ interrupts = <0 2 4>,
+ <0 3 4>,
+ <0 4 4>;
+ mdio-reg = <0x20 0x10090000 0 0x1000>;
+ mdio-clock = <0>;
+ phy-address = <0x3>;
+ ad-value = <0x61>;
+ mac-address = [00 00 00 00 00 00];
+ };
+
+ amba {
+ compatible = "arm,amba-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ axxia_serial0: uart at 2010080000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x20 0x10080000 0x00 0x1000>;
+ interrupts = <0 56 4>;
+ };
+
+ axxia_timers: timer at 2010091000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x20 0x10091000 0 0x1000>;
+ interrupts = <0 46 4>,
+ <0 47 4>,
+ <0 48 4>,
+ <0 49 4>,
+ <0 50 4>,
+ <0 51 4>,
+ <0 52 4>,
+ <0 53 4>;
+ };
+ };
+};
+
+/*
+ Local Variables:
+ mode: C
+ End:
+*/
diff --git a/arch/arm/boot/dts/axm55xxsim16.dts b/arch/arm/boot/dts/axm55xxsim16.dts
index 6e73be8..35e91ca 100644
--- a/arch/arm/boot/dts/axm55xxsim16.dts
+++ b/arch/arm/boot/dts/axm55xxsim16.dts
@@ -1,5 +1,5 @@
/*
- * arch/arm/boot/dts/axm55xxsim.dts
+ * arch/arm/boot/dts/axm55xxsim16.dts
*
* Copyright (C) 2012 LSI
*
--
1.7.9.5
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