[linux-yocto] [PATCH 05/10] cfg/x86_base: Create new base config for x86 Architectures

[Saul Wold]

On 07/01/2015 10:55 AM, Darren Hart wrote:
>
>
> On 7/1/15 9:57 AM, Saul Wold wrote:
>> Place the core x86 architecture kernel config items into a new
>> base config that the other x86 related architectures will use
>>
>> Signed-off-by: Saul Wold <sgw at linux.intel.com>
>> ---
>>   meta/cfg/kernel-cache/cfg/x86_base.cfg | 9 +++++++++
>>   meta/cfg/kernel-cache/cfg/x86_base.scc | 4 ++++
>>   2 files changed, 13 insertions(+)
>>   create mode 100644 meta/cfg/kernel-cache/cfg/x86_base.cfg
>>   create mode 100644 meta/cfg/kernel-cache/cfg/x86_base.scc
>>
>> diff --git a/meta/cfg/kernel-cache/cfg/x86_base.cfg b/meta/cfg/kernel-cache/cfg/x86_base.cfg
>> new file mode 100644
>> index 0000000..39263ef
>> --- /dev/null
>> +++ b/meta/cfg/kernel-cache/cfg/x86_base.cfg
>> @@ -0,0 +1,9 @@
>> +CONFIG_X86=y
>> +CONFIG_X86_MSR=y
>> +CONFIG_X86_CPUID=y
>> +CONFIG_MTRR=y
>> +CONFIG_PCI_MSI=y
>
> PCI_MSI seems a strange option for this list. It depends on PCI=y which
> isn't specified. It is automatically selected for one case (AMD
> specific). Curious how this ended up here.
>
So are you suggesting that this move the a pci.cfg similar to your 
suggestion of CONFIG_HOTPLUG_PCI?

I could do that and add CONFIG_PCI to enable PCI with and then drop 
CONFIG_PCI from many of the bsp fragments, but I would do that later.

>> +
>> +CONFIG_X86_CHECK_BIOS_CORRUPTION=y
>> +CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
>> +# CONFIG_MTRR_SANITIZER is not set
>
> Since this is expressly disabling something that is recommended to leave
> on, and which has a enable/disable default, and can be controlled via
> the command line - we need a specific reason for disabling
> MTRR_SANITIZER. Do we have a compelling case for disabling this on ALL
> x86 systems?
>
Quite Honestly this was a Cut and paste that both x86 and x86_64 had in 
them, so it was common, I don't have the history or the knowledge right 
now to understand the specific reason or compelling case to 
include/exclude that setting, so I kept it consistent.

I could remove it, but I would only be testing with the Quark right now 
since I don't have the bandwidth to test the reset of the BSPs, which is 
why I have not converted them.

Sau!

>> diff --git a/meta/cfg/kernel-cache/cfg/x86_base.scc b/meta/cfg/kernel-cache/cfg/x86_base.scc
>> new file mode 100644
>> index 0000000..a75808d
>> --- /dev/null
>> +++ b/meta/cfg/kernel-cache/cfg/x86_base.scc
>> @@ -0,0 +1,4 @@
>> +include efi.scc
>> +include timer/hpet.scc
>> +include timer/no_hz.scc
>> +kconf hardware x86_base.cfg
>>
>