[meta-xilinx] 2nd ethernet port not detected

[Mike Looijmans]

On 15-10-15 09:35, Edward Wingate wrote:
> I never got the 2nd ethernet device working on my custom Zynq board
> and dropped it for a while, but a recent email on this list asked
> about it and so prodded me to look at it again. I'm responding to
> multiple emails here.
>
> On Mon, May 18, 2015 at 10:16 PM, Mike Looijmans
> <mike.looijmans at topic.nl> wrote:
>> On 18-05-15 20:41, Edward Wingate wrote:
>>>
>>> I understand the PHY address of 0 is for broadcast, but from what I
>>> understand of the custom Zynq board I am using, each PHY is on its own
>>> bus, so it shouldn't matter in this case that I'm using the broadcast
>>> address (at least for my purposes at the moment).
>>
>> The internal PL PHY is on the same MDIO bus as the external one.
>> The eth0 and eth1 phys are on different busses.
>
> Mike, If you would, can you please provide some clarification on this?
>   When you say the "internal PL PHY", are you referring to the
> GMII-to-RGMII PL IP?  What is the "external one" that is on the same
> MDIO bus?   Is the "external one" different from the eth0 PHY chip and
> eth1 PHY chip?

Yes, the internal one is in logic in the IP. So there are TWO phys on that 
bus, and they need a unique address each.

> My enet/phy hardware looks like this:
> [PS ENET0] <---> [PHY chip w/ addr 0]
> [PS ENET1] <---> [GMII-to-RGMII PL IP w/ addr 8] <---> [PHY chip w/ addr 0]
>
> The PHY chip I am using talks RGMII.  It can have a PHY address of
> either 0 or 1, no other possibility. At the moment, I think both PHY
> chips are set to PHY address 0.

As the datasheet should have explained, "0" is not a valid PHY address. So 
that does not leave many options. "0" is actually the "broadcast" address on 
the MDIO bus, so all phys will respond to it. Which makes it work with just 
one PHY, but with multiple PHYs on the MDIO bus this will not work.

> My device tree:
> ps7_ethernet_0: ps7-ethernet at e000b000 {
>      phy-handle = <&phy0>;
>      phy-mode = "rgmii-id";
>      phy0: phy at 0 {
>          compatible = "marvell,88e1518";
>          device_type = "ethernet-phy";
>          reg = <0>;
>      } ;
> } ;
>
> ps7_ethernet_1: ps7-ethernet at e000c000 {
>      phy-handle = <&phy1>;
>      gmii2rgmii-phy-handle = <&phy_fpga>;
>      phy-mode = "gmii-id";
>      phy1: phy at 0 {
>          compatible = "marvell,88e1518";
>          device_type = "ethernet-phy";
>          reg = <0x0>;
>      } ;
>      phy_fpga: phy at 8 {
>           /* Internal GMII to RGMII adapter PHY */
>          reg = <0x8>;
>      } ;
> } ;
>
> On Thu, May 14, 2015 at 9:11 PM, Nathan Rossi <nathan at nathanrossi.com> wrote:
>> So one thing to note here is that the macb driver might not support
>> the GMII->RGMII wrapper, I believe there was some additional code
>> paths in the linux-xlnx emacps driver for it and at least one
>> additional device tree binding you might need.
>> https://github.com/Xilinx/linux-xlnx/blob/xlnx_3.14/drivers/net/ethernet/xilinx/xilinx_emacps.c#L2810
>
> eth0 works with both macb and emacps driver; eth1 doesn't work with any.
>
> With macb driver, eth1 is probed and eth1 interface exists (when
> running ifconfig), but I get "unable to generate target frequency:
> 125000000 Hz"  But curious why macb driver should even care or know
> that there's a converter in between.  It should be transparent and
> look like just another GMII interface, shouldn't it?  Or is it because
> macb driver only works with RGMII interface, not GMII?
>
> I'm using kernel 4.0.0 which appears to have the additional
> "gmii2rgmii-phy-handle" device tree binding. So using the xilinx
> emacps driver, I get a sysfs error when probing eth1: "cannot create
> duplicate filename '/class/mdio_bus/8608088e'  (I don't have the exact
> number there at the end right now).  Can specifying the wrong PHY
> address or having conflicting PHY addresses cause this?  The eth1
> interface does not exist in ifconfig when using the emacps driver.
>
> Is there anything wrong with my device tree?  Both PHY chips have
> address 0, but they're on different MDIO buses (I think), so should be
> OK?  Thanks again for your help.
>



Kind regards,

Mike Looijmans
System Expert

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